Update to Gecko SDK 5.1.2

Updating emlib

Author: stevew817

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/Changes_emlib.txt

@@ -1,4 +1,45 @@
 ================ Revision history ============================================
+5.1.2:
+ Misc. bugfixes and improvements.
+
+5.1.1:
+ - Enabled errata CMU_E113 workaround for EFM32GG revE.
+
+5.1.0:
+ - em_timer: Added support for WTIMER0 and WTIMER1. Added EFM_ASSERT in
+   em_timer to check that operations on a 16 bit timer is always <= 0xFFFF.
+ - em_usart: Updated the baudrate sync calculation in USART_BaudrateSyncSet().
+   The calculated baudrate is not using any fractional bits and it is always
+   lower than or equal to the specified frequency.
+ - em_emu: added function EMU_DCDCConductionModeSet() to allow switching
+   between DCDC Low-Noise Continuous Conduction Mode (CCM) and
+   Discontinuous Conduction Mode (DCM).
+ - SYSTEM_GetSRAMSize() updated to return size of SRAM excluding RAMH for EFR32xG1.
+ - em_csen: Added support for CSEN (Capacitive Sense Module).
+ - em_adc: updated ADC_PosSel_TypeDef enum names.
+ - em_vdac: Added support for VDAC (voltage DAC).
+ - em_smu: Added support for SMU (Security Management Unit) module.
+   SMU is used to restrict access to device peripherals.
+ - Updated emlib to use the _SILICON_LABS_32B_SERIES_x,
+   _SILICON_LABS_32B_SERIES_x_CONFIG and _SILICON_LABS_GECKO_INTERNAL_SDID_x
+   macros instead of the _SILICON_LABS_32B_PLATFORM_x and
+   _SILICON_LABS_32B_PLATFORM_x_GEN_x macros.
+ - em_rtcc: added workarounds for errata RTCC_E203 and RTCC_E204 for
+   EFR32xG12, EFM32xG12, EFR32xG13 and EFM32xG13 devices.
+ - em_lesense: added LESENSE_DecoderPrsOut() for configuring PRS output
+   from the LESENSE decoder on EFM32xG12 and EFR32xG12.
+ - em_lesense: added support for the new evaluation modes for EFM32xG12 and
+   EFR32xG12.
+ - em_emu: added EMU_RamPowerDown() function for powering down a memory range
+   and deprecating EMU_MemPwrDown().
+ - em_emu: added support for voltage scaling.
+ - em_emu: added support for EM2 and 3 peripheral retention control.
+ - em_chip: added current consumption fixes for EFM32xG12 and EFR32xG12.
+ - em_emu: added support for DCDC EM01-LP mode.
+ - em_lesense: Support for Series 1 devices
+ - em_acmp: Added ACMP_ExternalInputSelect() which is used when the ACMP is
+   controlled by an external module like LESENSE.
+
 5.0.0:
  - em_core: New module, contains API for enabling/disabling interrupts
    and implementing critical regions.

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_acmp.h

@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file em_acmp.h
  * @brief Analog Comparator (ACMP) peripheral API
- * @version 5.0.0
+ * @version 5.1.2
  *******************************************************************************
  * @section License
  * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
@@ -283,7 +283,7 @@ typedef enum
 } ACMP_VLPInput_Typedef;
 #endif
 
-#if defined(_SILICON_LABS_32B_PLATFORM_2)
+#if defined(_ACMP_INPUTSEL_POSSEL_APORT0XCH0)
 /** ACMP Input Selection */
 typedef enum
 {
@@ -447,8 +447,12 @@ typedef enum
   acmpInputAPORT4YCH14 = _ACMP_INPUTSEL_POSSEL_APORT4YCH14,
   acmpInputAPORT4XCH15 = _ACMP_INPUTSEL_POSSEL_APORT4XCH15,
   acmpInputAPORT4XCH31 = _ACMP_INPUTSEL_POSSEL_APORT4XCH31,
+#if defined(_ACMP_INPUTSEL_POSSEL_DACOUT0)
   acmpInputDACOUT0   = _ACMP_INPUTSEL_POSSEL_DACOUT0,
+#endif
+#if defined(_ACMP_INPUTSEL_POSSEL_DACOUT1)
   acmpInputDACOUT1   = _ACMP_INPUTSEL_POSSEL_DACOUT1,
+#endif
   acmpInputVLP       = _ACMP_INPUTSEL_POSSEL_VLP,
   acmpInputVBDIV     = _ACMP_INPUTSEL_POSSEL_VBDIV,
   acmpInputVADIV     = _ACMP_INPUTSEL_POSSEL_VADIV,
@@ -500,6 +504,31 @@ typedef enum
 } ACMP_Channel_TypeDef;
 #endif
 
+#if defined(_ACMP_EXTIFCTRL_MASK)
+/**
+ * ACMP External input select. This type is used to select which APORT that is
+ * used by an external module like LESENSE when it's taking control over
+ * the ACMP input.
+ */
+typedef enum
+{
+  acmpExternalInputAPORT0X  = _ACMP_EXTIFCTRL_APORTSEL_APORT0X,
+  acmpExternalInputAPORT0Y  = _ACMP_EXTIFCTRL_APORTSEL_APORT0Y,
+  acmpExternalInputAPORT1X  = _ACMP_EXTIFCTRL_APORTSEL_APORT1X,
+  acmpExternalInputAPORT1Y  = _ACMP_EXTIFCTRL_APORTSEL_APORT1Y,
+  acmpExternalInputAPORT1XY = _ACMP_EXTIFCTRL_APORTSEL_APORT1XY,
+  acmpExternalInputAPORT2X  = _ACMP_EXTIFCTRL_APORTSEL_APORT2X,
+  acmpExternalInputAPORT2Y  = _ACMP_EXTIFCTRL_APORTSEL_APORT2Y,
+  acmpExternalInputAPORT2YX = _ACMP_EXTIFCTRL_APORTSEL_APORT2YX,
+  acmpExternalInputAPORT3X  = _ACMP_EXTIFCTRL_APORTSEL_APORT3X,
+  acmpExternalInputAPORT3Y  = _ACMP_EXTIFCTRL_APORTSEL_APORT3Y,
+  acmpExternalInputAPORT3XY = _ACMP_EXTIFCTRL_APORTSEL_APORT3XY,
+  acmpExternalInputAPORT4X  = _ACMP_EXTIFCTRL_APORTSEL_APORT4X,
+  acmpExternalInputAPORT4Y  = _ACMP_EXTIFCTRL_APORTSEL_APORT4Y,
+  acmpExternalInputAPORT4YX = _ACMP_EXTIFCTRL_APORTSEL_APORT4YX,
+} ACMP_ExternalInput_Typedef;
+#endif
+
 /*******************************************************************************
  ******************************   STRUCTS   ************************************
  ******************************************************************************/
@@ -824,6 +853,9 @@ void ACMP_CapsenseChannelSet(ACMP_TypeDef *acmp, ACMP_Channel_TypeDef channel);
 void ACMP_ChannelSet(ACMP_TypeDef *acmp, ACMP_Channel_TypeDef negSel, ACMP_Channel_TypeDef posSel);
 void ACMP_Disable(ACMP_TypeDef *acmp);
 void ACMP_Enable(ACMP_TypeDef *acmp);
+#if defined(_ACMP_EXTIFCTRL_MASK)
+void ACMP_ExternalInputSelect(ACMP_TypeDef *acmp, ACMP_ExternalInput_Typedef aport);
+#endif
 void ACMP_GPIOSetup(ACMP_TypeDef *acmp, uint32_t location, bool enable, bool invert);
 void ACMP_Init(ACMP_TypeDef *acmp, const ACMP_Init_TypeDef *init);
 void ACMP_Reset(ACMP_TypeDef *acmp);

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_adc.h

@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file em_adc.h
  * @brief Analog to Digital Converter (ADC) peripheral API
- * @version 5.0.0
+ * @version 5.1.2
  *******************************************************************************
  * @section License
  * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
@@ -494,25 +494,26 @@ typedef enum
   adcPosSelAPORT4YCH30 = _ADC_SINGLECTRL_POSSEL_APORT4YCH30,
   adcPosSelAPORT4XCH31 = _ADC_SINGLECTRL_POSSEL_APORT4XCH31,
   adcPosSelAVDD        = _ADC_SINGLECTRL_POSSEL_AVDD,
-  adcPosSelBU          = _ADC_SINGLECTRL_POSSEL_BU,
-  adcPosSelAREG        = _ADC_SINGLECTRL_POSSEL_AREG,
-  adcPosSelVREGOUTPA   = _ADC_SINGLECTRL_POSSEL_VREGOUTPA,
-  adcPosSelPDBU        = _ADC_SINGLECTRL_POSSEL_PDBU,
-  adcPosSelIO0         = _ADC_SINGLECTRL_POSSEL_IO0,
-  adcPosSelIO1         = _ADC_SINGLECTRL_POSSEL_IO1,
-  adcPosSelVSP         = _ADC_SINGLECTRL_POSSEL_VSP,
+  adcPosSelDVDD        = _ADC_SINGLECTRL_POSSEL_AREG,
+  adcPosSelPAVDD       = _ADC_SINGLECTRL_POSSEL_VREGOUTPA,
+  adcPosSelDECOUPLE    = _ADC_SINGLECTRL_POSSEL_PDBU,
+  adcPosSelIOVDD       = _ADC_SINGLECTRL_POSSEL_IO0,
   adcPosSelOPA2        = _ADC_SINGLECTRL_POSSEL_OPA2,
   adcPosSelOPA3        = _ADC_SINGLECTRL_POSSEL_OPA3,
   adcPosSelTEMP        = _ADC_SINGLECTRL_POSSEL_TEMP,
   adcPosSelDAC0OUT0    = _ADC_SINGLECTRL_POSSEL_DAC0OUT0,
-  adcPosSelTESTP       = _ADC_SINGLECTRL_POSSEL_TESTP,
-  adcPosSelSP1         = _ADC_SINGLECTRL_POSSEL_SP1,
-  adcPosSelSP2         = _ADC_SINGLECTRL_POSSEL_SP2,
   adcPosSelDAC0OUT1    = _ADC_SINGLECTRL_POSSEL_DAC0OUT1,
   adcPosSelSUBLSB      = _ADC_SINGLECTRL_POSSEL_SUBLSB,
   adcPosSelDEFAULT     = _ADC_SINGLECTRL_POSSEL_DEFAULT,
   adcPosSelVSS         = _ADC_SINGLECTRL_POSSEL_VSS
 } ADC_PosSel_TypeDef;
+
+/* Map legacy or incorrectly named select enums to correct enums. */
+#define adcPosSelIO0            adcPosSelIOVDD
+#define adcPosSelVREGOUTPA      adcPosSelPAVDD
+#define adcPosSelAREG           adcPosSelDVDD
+#define adcPosSelPDBU           adcPosSelDECOUPLE
+
 #endif
 
 

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_aes.h

@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file em_aes.h
  * @brief Advanced encryption standard (AES) accelerator peripheral API.
- * @version 5.0.0
+ * @version 5.1.2
  *******************************************************************************
  * @section License
  * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_assert.h

@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file em_assert.h
  * @brief Emlib peripheral API "assert" implementation.
- * @version 5.0.0
+ * @version 5.1.2
  *******************************************************************************
  * @section License
  * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_burtc.h

@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file em_burtc.h
  * @brief Backup Real Time Counter (BURTC) peripheral API
- * @version 5.0.0
+ * @version 5.1.2
  *******************************************************************************
  * @section License
  * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_bus.h

@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file em_bus.h
  * @brief RAM and peripheral bit-field set and clear API
- * @version 5.0.0
+ * @version 5.1.2
  *******************************************************************************
  * @section License
  * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
@@ -30,8 +30,8 @@
  *
  ******************************************************************************/
 
-#ifndef EM_BUS__
-#define EM_BUS__
+#ifndef EM_BUS_H
+#define EM_BUS_H
 
 #include "em_device.h"
 
@@ -46,9 +46,9 @@ extern "C" {
 
 /***************************************************************************//**
  * @addtogroup BUS
- * @brief BUS RAM and register bit/field read/write API
+ * @brief BUS register and RAM bit/field read/write API
  * @details
- *  API to perform bitbanded and masked accesses to SRAM and peripheral memory.
+ *  API to perform bit-band and field set/clear access to RAM and peripherals.
  * @{
  ******************************************************************************/
 
@@ -280,7 +280,10 @@ __STATIC_INLINE void BUS_RegMaskedClear(volatile uint32_t *addr,
  * @param[in] mask Peripheral register mask
  *
  * @param[in] val Peripheral register value. The value must be shifted to the
-                  correct bit position in the register.
+                  correct bit position in the register corresponding to the field
+                  defined by the mask parameter. The register value must be
+                  contained in the field defined by the mask parameter. This
+                  function is not performing masking of val internally.
  ******************************************************************************/
 __STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr,
                                         uint32_t mask,
@@ -326,4 +329,4 @@ __STATIC_INLINE uint32_t BUS_RegMaskedRead(volatile const uint32_t *addr,
 }
 #endif
 
-#endif /* EM_BUS__ */
+#endif /* EM_BUS_H */

targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_chip.h

@@ -1,7 +1,7 @@
 /***************************************************************************//**
  * @file em_chip.h
  * @brief Chip Initialization API
- * @version 5.0.0
+ * @version 5.1.2
  *******************************************************************************
  * @section License
  * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
@@ -49,7 +49,7 @@ extern "C" {
 
 /***************************************************************************//**
  * @addtogroup CHIP
- * @brief Chip Initialization API
+ * @brief Chip errata workarounds initialization API
  * @details
  *  API to initialize chip for errata workarounds.
  * @{
@@ -69,7 +69,7 @@ extern "C" {
  *****************************************************************************/
 __STATIC_INLINE void CHIP_Init(void)
 {
-#if defined(_EFM32_GECKO_FAMILY)
+#if defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_GECKO_FAMILY)
   uint32_t                    rev;
   SYSTEM_ChipRevision_TypeDef chipRev;
   volatile uint32_t           *reg;
@@ -161,26 +161,31 @@ __STATIC_INLINE void CHIP_Init(void)
   }
 #endif
 
-#if defined(_EFM32_GIANT_FAMILY)
-  uint32_t                    rev;
+#if defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_GIANT_FAMILY)
+
+  /****************************/
+  /* Fix for errata CMU_E113. */
+
+  uint8_t                     prodRev;
   SYSTEM_ChipRevision_TypeDef chipRev;
 
-  rev = *(volatile uint32_t *)(0x0FE081FC);
+  prodRev = SYSTEM_GetProdRev();
   SYSTEM_ChipRevisionGet(&chipRev);
 
-  if (((rev >> 24) > 15) && (chipRev.minor == 3))
+  if ((prodRev >= 16) && (chipRev.minor >= 3))
   {
     /* This fixes an issue with the LFXO on high temperatures. */
     *(volatile uint32_t*)0x400C80C0 =
-                      ( *(volatile uint32_t*)0x400C80C0 & ~(1<<6) ) | (1<<4);
+                      ( *(volatile uint32_t*)0x400C80C0 & ~(1 << 6) ) | (1 << 4);
   }
 #endif
 
-#if defined(_EFM32_HAPPY_FAMILY)
-  uint32_t rev;
-  rev = *(volatile uint32_t *)(0x0FE081FC);
+#if defined(_SILICON_LABS_32B_SERIES_0) && defined(_EFM32_HAPPY_FAMILY)
+
+  uint8_t prodRev;
+  prodRev = SYSTEM_GetProdRev();
 
-  if ((rev >> 24) <= 129)
+  if (prodRev <= 129)
   {
     /* This fixes a mistaken internal connection between PC0 and PC4 */
     /* This disables an internal pulldown on PC4 */
@@ -190,7 +195,7 @@ __STATIC_INLINE void CHIP_Init(void)
   }
 #endif
 
-#if defined(_SILICON_LABS_32B_PLATFORM_2_GEN_1)
+#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80)
 
   /****************************
   * Fixes for errata GPIO_E201 (slewrate) and
@@ -244,11 +249,33 @@ __STATIC_INLINE void CHIP_Init(void)
   }
 #endif
 
-#if defined(_SILICON_LABS_32B_PLATFORM_2_GEN_2)
+#if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_84)
 
-  /* No fixes required. */
+  uint8_t prodRev = SYSTEM_GetProdRev();
 
+  /* EM2 current fixes for early samples */
+  if (prodRev == 0)
+  {
+    *(volatile uint32_t *)(EMU_BASE + 0x190)  = 0x0000ADE8UL;
+    *(volatile uint32_t *)(EMU_BASE + 0x198) |= (0x1 << 2);
+    *(volatile uint32_t *)(EMU_BASE + 0x190)  = 0x0;
+  }
+  if (prodRev < 2)
+  {
+    *(volatile uint32_t *)(EMU_BASE + 0x164) |= (0x1 << 13);
+  }
+
+  /* Set optimal LFRCOCTRL VREFUPDATE and enable duty cycling of vref */
+  CMU->LFRCOCTRL = (CMU->LFRCOCTRL & ~_CMU_LFRCOCTRL_VREFUPDATE_MASK)
+                    | CMU_LFRCOCTRL_VREFUPDATE_64CYCLES
+                    | CMU_LFRCOCTRL_ENVREF;
 #endif
+
+#if defined(_EFR_DEVICE) && (_SILICON_LABS_GECKO_INTERNAL_SDID >= 84)
+  MSC->CTRL |= 0x1 << 8;
+#endif
+
+
 }
 
 /** @} (end addtogroup CHIP) */