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jeromecoutantadbridge
jeromecoutant
authored and
adbridge
committed
TARGET_STM32F3 astyle
1 parent b3292e2 commit f5830bf

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22 files changed

+327
-320
lines changed

22 files changed

+327
-320
lines changed

‎targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/PinNames.h

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -54,14 +54,14 @@ typedef enum {
5454
PA_5 = 0x05,
5555
PA_6 = 0x06,
5656
PA_7 = 0x07,
57-
PA_7_ALT0 = PA_7|ALT0,
57+
PA_7_ALT0 = PA_7 | ALT0,
5858
PA_8 = 0x08,
5959
PA_9 = 0x09,
6060
PA_10 = 0x0A,
6161
PA_11 = 0x0B,
62-
PA_11_ALT0 = PA_11|ALT0,
62+
PA_11_ALT0 = PA_11 | ALT0,
6363
PA_12 = 0x0C,
64-
PA_12_ALT0 = PA_12|ALT0,
64+
PA_12_ALT0 = PA_12 | ALT0,
6565
PA_13 = 0x0D,
6666
PA_14 = 0x0E,
6767
PA_15 = 0x0F,
@@ -81,10 +81,10 @@ typedef enum {
8181
PB_12 = 0x1C,
8282
PB_13 = 0x1D,
8383
PB_14 = 0x1E,
84-
PB_14_ALT0 = PB_14|ALT0,
84+
PB_14_ALT0 = PB_14 | ALT0,
8585
PB_15 = 0x1F,
86-
PB_15_ALT0 = PB_15|ALT0,
87-
PB_15_ALT1 = PB_15|ALT1,
86+
PB_15_ALT0 = PB_15 | ALT0,
87+
PB_15_ALT1 = PB_15 | ALT1,
8888

8989
PC_0 = 0x20,
9090
PC_1 = 0x21,
@@ -169,17 +169,17 @@ typedef enum {
169169
SPI_CS = PB_6,
170170
PWM_OUT = PB_4,
171171

172-
/**** USB pins ****/
172+
/**** USB pins ****/
173173
USB_DM = PA_11,
174174
USB_DP = PA_12,
175175

176-
/**** OSCILLATOR pins ****/
176+
/**** OSCILLATOR pins ****/
177177
RCC_OSC32_IN = PC_14,
178178
RCC_OSC32_OUT = PC_15,
179179
RCC_OSC_IN = PF_0,
180180
RCC_OSC_OUT = PF_1,
181181

182-
/**** DEBUG pins ****/
182+
/**** DEBUG pins ****/
183183
SYS_JTCK_SWCLK = PA_14,
184184
SYS_JTDI = PA_15,
185185
SYS_JTDO_TRACESWO = PB_3,

‎targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/TARGET_NUCLEO_F302R8/system_clock.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ void SystemInit(void)
6767
{
6868
/* FPU settings ------------------------------------------------------------*/
6969
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
70-
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
70+
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
7171
#endif
7272

7373
/* Reset the RCC clock configuration to the default reset state ------------*/
@@ -130,7 +130,7 @@ void SetSysClock(void)
130130
if (SetSysClock_PLL_HSI() == 0)
131131
#endif
132132
{
133-
while(1) {
133+
while (1) {
134134
MBED_ASSERT(1);
135135
}
136136
}

‎targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/TARGET_NUCLEO_F303K8/PinNames.h

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -53,33 +53,33 @@ typedef enum {
5353
PA_4 = 0x04,
5454
PA_5 = 0x05,
5555
PA_6 = 0x06,
56-
PA_6_ALT0 = PA_6|ALT0,
56+
PA_6_ALT0 = PA_6 | ALT0,
5757
PA_7 = 0x07,
58-
PA_7_ALT0 = PA_7|ALT0,
59-
PA_7_ALT1 = PA_7|ALT1,
58+
PA_7_ALT0 = PA_7 | ALT0,
59+
PA_7_ALT1 = PA_7 | ALT1,
6060
PA_8 = 0x08,
6161
PA_9 = 0x09,
6262
PA_10 = 0x0A,
6363
PA_11 = 0x0B,
64-
PA_11_ALT0 = PA_11|ALT0,
64+
PA_11_ALT0 = PA_11 | ALT0,
6565
PA_12 = 0x0C,
66-
PA_12_ALT0 = PA_12|ALT0,
66+
PA_12_ALT0 = PA_12 | ALT0,
6767
PA_13 = 0x0D,
6868
PA_14 = 0x0E,
6969
PA_15 = 0x0F,
7070

7171
PB_0 = 0x10,
72-
PB_0_ALT0 = PB_0|ALT0,
72+
PB_0_ALT0 = PB_0 | ALT0,
7373
PB_1 = 0x11,
74-
PB_1_ALT0 = PB_1|ALT0,
74+
PB_1_ALT0 = PB_1 | ALT0,
7575
PB_3 = 0x13,
7676
PB_4 = 0x14,
77-
PB_4_ALT0 = PB_4|ALT0,
77+
PB_4_ALT0 = PB_4 | ALT0,
7878
PB_5 = 0x15,
79-
PB_5_ALT0 = PB_5|ALT0,
79+
PB_5_ALT0 = PB_5 | ALT0,
8080
PB_6 = 0x16,
8181
PB_7 = 0x17,
82-
PB_7_ALT0 = PB_7|ALT0,
82+
PB_7_ALT0 = PB_7 | ALT0,
8383

8484
PF_0 = 0x50,
8585
PF_1 = 0x51,
@@ -148,11 +148,11 @@ typedef enum {
148148
SPI_CS = PA_11,
149149
PWM_OUT = PA_8,
150150

151-
/**** OSCILLATOR pins ****/
151+
/**** OSCILLATOR pins ****/
152152
RCC_OSC_IN = PF_0,
153153
RCC_OSC_OUT = PF_1,
154154

155-
/**** DEBUG pins ****/
155+
/**** DEBUG pins ****/
156156
SYS_JTCK_SWCLK = PA_14,
157157
SYS_JTDI = PA_15,
158158
SYS_JTDO_TRACESWO = PB_3,

‎targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/TARGET_NUCLEO_F303K8/system_clock.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ void SystemInit(void)
6767
{
6868
/* FPU settings ------------------------------------------------------------*/
6969
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
70-
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
70+
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
7171
#endif
7272

7373
/* Reset the RCC clock configuration to the default reset state ------------*/
@@ -130,7 +130,7 @@ void SetSysClock(void)
130130
if (SetSysClock_PLL_HSI() == 0)
131131
#endif
132132
{
133-
while(1) {
133+
while (1) {
134134
MBED_ASSERT(1);
135135
}
136136
}

‎targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/PinNames.h

Lines changed: 51 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -51,88 +51,88 @@ typedef enum {
5151
PA_2 = 0x02,
5252
PA_3 = 0x03,
5353
PA_4 = 0x04,
54-
PA_4_ALT0 = PA_4|ALT0,
54+
PA_4_ALT0 = PA_4 | ALT0,
5555
PA_5 = 0x05,
5656
PA_6 = 0x06,
57-
PA_6_ALT0 = PA_6|ALT0,
57+
PA_6_ALT0 = PA_6 | ALT0,
5858
PA_7 = 0x07,
59-
PA_7_ALT0 = PA_7|ALT0,
60-
PA_7_ALT1 = PA_7|ALT1,
61-
PA_7_ALT2 = PA_7|ALT2,
59+
PA_7_ALT0 = PA_7 | ALT0,
60+
PA_7_ALT1 = PA_7 | ALT1,
61+
PA_7_ALT2 = PA_7 | ALT2,
6262
PA_8 = 0x08,
6363
PA_9 = 0x09,
6464
PA_10 = 0x0A,
6565
PA_11 = 0x0B,
66-
PA_11_ALT0 = PA_11|ALT0,
67-
PA_11_ALT1 = PA_11|ALT1,
66+
PA_11_ALT0 = PA_11 | ALT0,
67+
PA_11_ALT1 = PA_11 | ALT1,
6868
PA_12 = 0x0C,
69-
PA_12_ALT0 = PA_12|ALT0,
70-
PA_12_ALT1 = PA_12|ALT1,
69+
PA_12_ALT0 = PA_12 | ALT0,
70+
PA_12_ALT1 = PA_12 | ALT1,
7171
PA_13 = 0x0D,
72-
PA_13_ALT0 = PA_13|ALT0,
72+
PA_13_ALT0 = PA_13 | ALT0,
7373
PA_14 = 0x0E,
7474
PA_15 = 0x0F,
75-
PA_15_ALT0 = PA_15|ALT0,
75+
PA_15_ALT0 = PA_15 | ALT0,
7676

7777
PB_0 = 0x10,
78-
PB_0_ALT0 = PB_0|ALT0,
79-
PB_0_ALT1 = PB_0|ALT1,
78+
PB_0_ALT0 = PB_0 | ALT0,
79+
PB_0_ALT1 = PB_0 | ALT1,
8080
PB_1 = 0x11,
81-
PB_1_ALT0 = PB_1|ALT0,
82-
PB_1_ALT1 = PB_1|ALT1,
81+
PB_1_ALT0 = PB_1 | ALT0,
82+
PB_1_ALT1 = PB_1 | ALT1,
8383
PB_2 = 0x12,
8484
PB_3 = 0x13,
85-
PB_3_ALT0 = PB_3|ALT0,
85+
PB_3_ALT0 = PB_3 | ALT0,
8686
PB_4 = 0x14,
87-
PB_4_ALT0 = PB_4|ALT0,
88-
PB_4_ALT1 = PB_4|ALT1,
87+
PB_4_ALT0 = PB_4 | ALT0,
88+
PB_4_ALT1 = PB_4 | ALT1,
8989
PB_5 = 0x15,
90-
PB_5_ALT0 = PB_5|ALT0,
91-
PB_5_ALT1 = PB_5|ALT1,
90+
PB_5_ALT0 = PB_5 | ALT0,
91+
PB_5_ALT1 = PB_5 | ALT1,
9292
PB_6 = 0x16,
93-
PB_6_ALT0 = PB_6|ALT0,
94-
PB_6_ALT1 = PB_6|ALT1,
93+
PB_6_ALT0 = PB_6 | ALT0,
94+
PB_6_ALT1 = PB_6 | ALT1,
9595
PB_7 = 0x17,
96-
PB_7_ALT0 = PB_7|ALT0,
97-
PB_7_ALT1 = PB_7|ALT1,
96+
PB_7_ALT0 = PB_7 | ALT0,
97+
PB_7_ALT1 = PB_7 | ALT1,
9898
PB_8 = 0x18,
99-
PB_8_ALT0 = PB_8|ALT0,
100-
PB_8_ALT1 = PB_8|ALT1,
99+
PB_8_ALT0 = PB_8 | ALT0,
100+
PB_8_ALT1 = PB_8 | ALT1,
101101
PB_9 = 0x19,
102-
PB_9_ALT0 = PB_9|ALT0,
103-
PB_9_ALT1 = PB_9|ALT1,
102+
PB_9_ALT0 = PB_9 | ALT0,
103+
PB_9_ALT1 = PB_9 | ALT1,
104104
PB_10 = 0x1A,
105105
PB_11 = 0x1B,
106106
PB_12 = 0x1C,
107107
PB_13 = 0x1D,
108108
PB_14 = 0x1E,
109-
PB_14_ALT0 = PB_14|ALT0,
109+
PB_14_ALT0 = PB_14 | ALT0,
110110
PB_15 = 0x1F,
111-
PB_15_ALT0 = PB_15|ALT0,
112-
PB_15_ALT1 = PB_15|ALT1,
111+
PB_15_ALT0 = PB_15 | ALT0,
112+
PB_15_ALT1 = PB_15 | ALT1,
113113

114114
PC_0 = 0x20,
115-
PC_0_ALT0 = PC_0|ALT0,
115+
PC_0_ALT0 = PC_0 | ALT0,
116116
PC_1 = 0x21,
117-
PC_1_ALT0 = PC_1|ALT0,
117+
PC_1_ALT0 = PC_1 | ALT0,
118118
PC_2 = 0x22,
119-
PC_2_ALT0 = PC_2|ALT0,
119+
PC_2_ALT0 = PC_2 | ALT0,
120120
PC_3 = 0x23,
121-
PC_3_ALT0 = PC_3|ALT0,
121+
PC_3_ALT0 = PC_3 | ALT0,
122122
PC_4 = 0x24,
123123
PC_5 = 0x25,
124124
PC_6 = 0x26,
125-
PC_6_ALT0 = PC_6|ALT0,
125+
PC_6_ALT0 = PC_6 | ALT0,
126126
PC_7 = 0x27,
127-
PC_7_ALT0 = PC_7|ALT0,
127+
PC_7_ALT0 = PC_7 | ALT0,
128128
PC_8 = 0x28,
129-
PC_8_ALT0 = PC_8|ALT0,
129+
PC_8_ALT0 = PC_8 | ALT0,
130130
PC_9 = 0x29,
131-
PC_9_ALT0 = PC_9|ALT0,
131+
PC_9_ALT0 = PC_9 | ALT0,
132132
PC_10 = 0x2A,
133-
PC_10_ALT0 = PC_10|ALT0,
133+
PC_10_ALT0 = PC_10 | ALT0,
134134
PC_11 = 0x2B,
135-
PC_11_ALT0 = PC_11|ALT0,
135+
PC_11_ALT0 = PC_11 | ALT0,
136136
PC_12 = 0x2C,
137137
PC_13 = 0x2D,
138138
PC_14 = 0x2E,
@@ -149,15 +149,15 @@ typedef enum {
149149
PD_8 = 0x38,
150150
PD_9 = 0x39,
151151
PD_10 = 0x3A,
152-
PD_10_ALT0 = PD_10|ALT0,
152+
PD_10_ALT0 = PD_10 | ALT0,
153153
PD_11 = 0x3B,
154-
PD_11_ALT0 = PD_11|ALT0,
154+
PD_11_ALT0 = PD_11 | ALT0,
155155
PD_12 = 0x3C,
156-
PD_12_ALT0 = PD_12|ALT0,
156+
PD_12_ALT0 = PD_12 | ALT0,
157157
PD_13 = 0x3D,
158-
PD_13_ALT0 = PD_13|ALT0,
158+
PD_13_ALT0 = PD_13 | ALT0,
159159
PD_14 = 0x3E,
160-
PD_14_ALT0 = PD_14|ALT0,
160+
PD_14_ALT0 = PD_14 | ALT0,
161161
PD_15 = 0x3F,
162162

163163
PE_0 = 0x40,
@@ -169,7 +169,7 @@ typedef enum {
169169
PE_6 = 0x46,
170170
PE_7 = 0x47,
171171
PE_8 = 0x48,
172-
PE_8_ALT0 = PE_8|ALT0,
172+
PE_8_ALT0 = PE_8 | ALT0,
173173
PE_9 = 0x49,
174174
PE_10 = 0x4A,
175175
PE_11 = 0x4B,
@@ -181,7 +181,7 @@ typedef enum {
181181
PF_0 = 0x50,
182182
PF_1 = 0x51,
183183
PF_2 = 0x52,
184-
PF_2_ALT0 = PF_2|ALT0,
184+
PF_2_ALT0 = PF_2 | ALT0,
185185
PF_3 = 0x53,
186186
PF_4 = 0x54,
187187
PF_5 = 0x55,
@@ -271,17 +271,17 @@ typedef enum {
271271
SPI_CS = PB_6,
272272
PWM_OUT = PB_4,
273273

274-
/**** USB pins ****/
274+
/**** USB pins ****/
275275
USB_DM = PA_11,
276276
USB_DP = PA_12,
277277

278-
/**** OSCILLATOR pins ****/
278+
/**** OSCILLATOR pins ****/
279279
RCC_OSC32_IN = PC_14,
280280
RCC_OSC32_OUT = PC_15,
281281
RCC_OSC_IN = PF_0,
282282
RCC_OSC_OUT = PF_1,
283283

284-
/**** DEBUG pins ****/
284+
/**** DEBUG pins ****/
285285
SYS_JTCK_SWCLK = PA_14,
286286
SYS_JTDI = PA_15,
287287
SYS_JTDO_TRACESWO = PB_3,

‎targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/TARGET_DISCO_F303VC/system_clock.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ void SystemInit(void)
6666
{
6767
/* FPU settings ------------------------------------------------------------*/
6868
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
69-
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
69+
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
7070
#endif
7171

7272
/* Reset the RCC clock configuration to the default reset state ------------*/
@@ -129,7 +129,7 @@ void SetSysClock(void)
129129
if (SetSysClock_PLL_HSI() == 0)
130130
#endif
131131
{
132-
while(1) {
132+
while (1) {
133133
MBED_ASSERT(1);
134134
}
135135
}

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