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1. Math-Expressions-parser Math-Expressions-parser Public

   Custom library for functions that can Lexically tokenize , create data structures that represent a mathematical expression's structure in RPN

   C 1

2. FPGA_timing_extraction FPGA_timing_extraction Public archive

   Automation framework for maximum clock frequency characterization of synthesizable Hardware designs for Xilinx FPGAs

   Tcl

3. BCD_to_7-Segment BCD_to_7-Segment Public

   Forked from 123Dibya/BCD_to_7-Segment

   A BCD to 7-Segment Decoder is a combinational circuit that takes a Binary Coded Decimal (BCD) input (0 to 9 in binary) and converts it to the corresponding 7-segment display output.

   SystemVerilog

4. VerilogDigitalDesigns VerilogDigitalDesigns Public

   Digital design descriptions mostly structural

   Verilog 1 2

5. SPICE_sims SPICE_sims Public

   simulations of various Analog circuits in ngspice

   Raku 1 1

6. MN_adder_verilog_generator MN_adder_verilog_generator Public

   Scripts that can generate the verilog description of a parameterized M-N Adder Architecture

   Tcl