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FFT-DIF-DIT-systolic-implementation
FFT-DIF-DIT-systolic-implementation PublicForked from AmbatipudiAdithi/FFT-DIF-DIT-systolic-implementation
Implementation of DIF & DIT FFT in Verilog with and without systolic architectures to compare utilization of resources.
Verilog 1
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6T-SRAM-MTCMOS
6T-SRAM-MTCMOS PublicDesign, simulation, and analysis of a low-power 6T SRAM cell using MTCMOS and stacking techniques
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RISC-V-single-cycle
RISC-V-single-cycle PublicThis project implements a synthesizable single-cycle RISC-V processor that supports a subset of RV32I instructions (R-type, I-type, and S-type). Designed entirely in Verilog, the processor executes…
Verilog 1
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Watering-Plant-Bot
Watering-Plant-Bot PublicA simple plant-watering system that uses ROS 2 (Python) and Arduino UNO via serial communication.
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rock-paper-scissors
rock-paper-scissors PublicA fun two-player Rock-Paper-Scissors game built using Python Tkinter for the GUI and PIL (Pillow) for image handling. The game provides a dynamic interface where each player's selection updates the…
Python 1
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