Merge pull request ceph#65120 from leiwen2025/wip-add-rv64-high-precision-counter-support

common/Cycles: Add high-precision counter support for riscv64

Reviewed-by: Kefu Chai <[email protected]>

Author: tchaikov

src/common/Cycles.h

@@ -84,6 +84,10 @@ class Cycles {
     uint64_t tsc;
     asm volatile("stck %0" : "=Q" (tsc) : : "cc");
     return tsc;
+#elif defined(__riscv) && __riscv_xlen == 64
+    uint64_t tsc;
+    asm volatile ("rdtime %0" : "=r" (tsc));
+    return tsc;
 #else
 #warning No high-precision counter available for your OS/arch
     return 0;