Support Zbb.

Author: Arnavion

Makefile

@@ -24,7 +24,9 @@ test:
 	for bitness in '--32' '--64'; do \
 		for compress in 'false' 'true' 'Zcb'; do \
 			for zba in '' '--zba'; do \
-				for f in tc/*.S; do cargo run --bin riscv -- $$bitness "--compress=$$compress" $$zba "$$f" >/dev/null || exit 1; done; \
+				for zbb in '' '--zbb'; do \
+					for f in tc/*.S; do cargo run --bin riscv -- $$bitness "--compress=$$compress" $$zba $$zbb "$$f" >/dev/null || exit 1; done; \
+				done; \
 			done; \
 		done; \
 	done

README.md

@@ -26,6 +26,8 @@ The assembler only supports what the emulator implements. Per the [unprivileged
 
 - Zba 1.0.0 (address generation instructions)
 
+- Zbb 1.0.0 (basic bit-manipulation instructions)
+
 - Zbs 1.0.0 (single-bit instructions)
 
 Further extensions are not supported, notably instructions for hardware multiplication and division (M) and hardware floats (F, D).
@@ -56,7 +58,7 @@ The assembler does not consider whether the target architecture is 32-bit or 64-
 
 Therefore the assembler also has a `--64` flag to explicitly set the target architecture to RV64I. When combined with the `--compress` flag it will instruct the assembler to not compress `jal`.
 
-The `*.c` files contain equivalent C solutions that can be put in [Compiler Explorer](https://gcc.godbolt.org/) with compiler set to `RISC-V (32-bits) gcc` or `RISC-V rv32gc clang` or corresponding 64-bit version, and flags set to `--std=c23 -Os -march=rv32id_zba_zbs_zicond` or `--std=c23 -Os -march=rv64id_zba_zbs_zicond`. Note that the assembler programs are hand-written and will not exactly match the compiler's output.
+The `*.c` files contain equivalent C solutions that can be put in [Compiler Explorer](https://gcc.godbolt.org/) with compiler set to `RISC-V (32-bits) gcc` or `RISC-V rv32gc clang` or corresponding 64-bit version, and flags set to `--std=c23 -Os -march=rv32id_zba_zbb_zbs_zicond` or `--std=c23 -Os -march=rv64id_zba_zbb_zbs_zicond`. Note that the assembler programs are hand-written and will not exactly match the compiler's output.
 
 The emulator has the Level Input and Level Output wired up to memory address `2^32 - 1`, which is why the assembler programs refer to `-1(zero)` and the C programs refer to `IO = (volatile uint8_t*)(intptr_t)-1;`.
 

freestanding/riscv64-arnavion-none-elf.json

@@ -7,7 +7,7 @@
 	"data-layout": "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128",
 	"eh-frame-header": false,
 	"emit-debug-gdb-scripts": false,
-	"features": "+forced-atomics,+zba,+zbs,+zca,+zcb,+zicond,+zicsr,+zicntr,+auipc-addi-fusion,+ld-add-fusion,+lui-addi-fusion",
+	"features": "+forced-atomics,+zba,+zbb,+zbs,+zca,+zcb,+zicond,+zicsr,+zicntr,+auipc-addi-fusion,+ld-add-fusion,+lui-addi-fusion",
 	"linker": "rust-lld",
 	"linker-flavor": "gnu-lld",
 	"llvm-target": "riscv64",