A7-A11, T2 SoC cpufreq support#439
Merged
svenpeter42 merged 5 commits intoAsahiLinux:mainfrom Feb 23, 2025
Merged
Conversation
Contributor
Author
|
this is also a requirement for proper operation of the proxy with the physical uart, as the cpu is too slow otherwise |
svenpeter42
requested changes
Feb 23, 2025
Some power domains are not referenced by other nodes through clock-gates or power-gates, so this is needed. Signed-off-by: Nick Chan <towinchenmi@gmail.com>
This is the 64-bit variant of poll32(). Signed-off-by: Nick Chan <towinchenmi@gmail.com>
asdfugil
force-pushed
the
cpufreq-legacy
branch
2 times, most recently
from
ad865f8 to
9014dce
Compare
Contributor
Author
|
Changes:
|
asdfugil
force-pushed
the
cpufreq-legacy
branch
2 times, most recently
from
c126662 to
f10335f
Compare
svenpeter42
requested changes
Feb 23, 2025
src/cpufreq.c
Outdated
| if (pstate_reg_to_pstate(val) != pstate) { | ||
| switch (chip_id) { | ||
| case S5L8960X: | ||
| case T7000 ... T7001: |
Member
There was a problem hiding this comment.
This is now just hiding the comparisons that I'd like to avoid. Please get rid of the ... stuff as well and just open code all the chip_ids here.
| case S8000 ... T8103: | ||
| case T6000 ... T6002: | ||
| val &= ~CLUSTER_PSTATE_DESIRED2; | ||
| val |= CLUSTER_PSTATE_SET | FIELD_PREP(CLUSTER_PSTATE_DESIRED2, pstate); |
Member
There was a problem hiding this comment.
please add a // fallthrough comment here
src/cpufreq.c
Outdated
| case S5L8960X: | ||
| write32(pmgr_reg + PMGR_VOLTAGE_CTL_OFF_S5L8960X, 1); | ||
| break; | ||
| case T7000 ... T7001: |
Member
There was a problem hiding this comment.
same as above: please don't rely on hidden comparisons here and just enumerate all chips
svenpeter42
reviewed
Feb 23, 2025
src/cpufreq.c
Outdated
| break; | ||
| case T8103 ... T8122: | ||
| case T6000 ... T6034: | ||
| default: |
Member
There was a problem hiding this comment.
Please also separate out the default case and just print that the chip is unsupported
asdfugil
force-pushed
the
cpufreq-legacy
branch
6 times, most recently
from
5af344c to
07ac6ce
Compare
The existing code is already confusing as is and support for more chips with different requirements will be added, which would make the code even more confusing. Instead, switch to a hardcoded list of chip_id's for operations that are chip-specific or will be chip-speciifc. Signed-off-by: Nick Chan <towinchenmi@gmail.com>
cpufreq support for Apple A9 will be added. It requires 64-bit access on the CLUSTER_PSTATE register. Signed-off-by: Nick Chan <towinchenmi@gmail.com>
asdfugil
force-pushed
the
cpufreq-legacy
branch
from
07ac6ce to
c72f0ae
Compare
- A7-A8X uses 3 bits only for pstate, and PS1 mask is GENMASK(24, 22) - Add tunables, mainly the voltage control register in PMGR (iBoot boots us with voltage changes seemingly disabled, with obvious disastrous outcome trying to switch to high P-states) - Skip writes to offset 0x4xxxx from cluster->base for A7-A11, T2. The range starting from 0x40000 from cluster->base does not exist in ADT /arm-io/pmgr, so it probably does not exist for those older chips. This includes the 0x440f8 and ppt-thrtl writes. Signed-off-by: Nick Chan <towinchenmi@gmail.com>
asdfugil
force-pushed
the
cpufreq-legacy
branch
from
c72f0ae to
69d1fee
Compare
Contributor
Author
|
Changes:
|
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
This adds the tunables required for cpufreq to work properly on A7-A11, T2 SoCs, most prominently a register poke to enable voltage changes when the state is changed, as iBoot leaves the voltage controls disabled.