GitHub - Atlaszyw/TRV: 2024数字集成电路课程设计及后续开发

#Tinyriscv_pro

修改版本的 tinyriscv, 优化级间握手规则

Name		Name	Last commit message	Last commit date
Latest commit History 38 Commits
.vscode		.vscode
boot		boot
design		design
doc		doc
download		download
pyverilator		pyverilator
script		script
tb		tb
ted		ted
verify		verify
.clang-format		.clang-format
.clangd		.clangd
.gitignore		.gitignore
.stignore		.stignore
LICENSE		LICENSE
README.md		README.md
compile.vc		compile.vc
fpga_xilinx.xpr		fpga_xilinx.xpr
slang.md		slang.md
test.py		test.py
verible.filelist		verible.filelist
waiver.txt		waiver.txt
xmake.lua		xmake.lua

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