Maint/sd card clk

external/asf4-drivers/Config/conf_sd_mmc.h

@@ -0,0 +1,79 @@
+/* Auto-generated config file conf_sd_mmc.h */
+#ifndef CONF_SD_MMC_H
+#define CONF_SD_MMC_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+// <q> Enable the SDIO support
+// <id> conf_sdio_support
+#ifndef CONF_SDIO_SUPPORT
+#define CONF_SDIO_SUPPORT 1
+#endif
+
+// <q> Enable the MMC card support
+// <id> conf_mmc_support
+#ifndef CONF_MMC_SUPPORT
+#define CONF_MMC_SUPPORT 0
+#endif
+
+// <q> Enable the OS support
+// <id> conf_sd_mmc_os_support
+#ifndef CONF_OS_SUPPORT
+#define CONF_OS_SUPPORT 0
+#endif
+
+// Detection (card/write protect) timeout (ms/ticks)
+// conf_sd_mmc_debounce
+#ifndef CONF_SD_MMC_DEBOUNCE
+#define CONF_SD_MMC_DEBOUNCE 1000
+#endif
+
+#ifndef CONF_SD_MMC_MEM_CNT
+#define CONF_SD_MMC_MEM_CNT 1
+#endif
+
+// <e> SD/MMC Slot 0
+// <id> conf_sd_mmc_0_enable
+#ifndef CONF_SD_MMC_0_ENABLE
+#define CONF_SD_MMC_0_ENABLE 1
+#endif
+
+// <e> Card Detect (CD) 0 Enable
+// <id> conf_sd_mmc_0_cd_detect_en
+#ifndef CONF_SD_MMC_0_CD_DETECT_EN
+#define CONF_SD_MMC_0_CD_DETECT_EN 1
+#endif
+
+// <o> Card Detect (CD) detection level
+// <1=> High
+// <0=> Low
+// <id> conf_sd_mmc_0_cd_detect_value
+#ifndef CONF_SD_MMC_0_CD_DETECT_VALUE
+#define CONF_SD_MMC_0_CD_DETECT_VALUE 0
+#endif
+// </e>
+
+// <e> Write Protect (WP) 0 Enable
+// <id> conf_sd_mmc_0_wp_detect_en
+#ifndef CONF_SD_MMC_0_WP_DETECT_EN
+#define CONF_SD_MMC_0_WP_DETECT_EN 0
+#endif
+
+// <o> Write Protect (WP) detection level
+// <1=> High
+// <0=> Low
+// <id> conf_sd_mmc_0_wp_detect_value
+#ifndef CONF_SD_MMC_0_WP_DETECT_VALUE
+#define CONF_SD_MMC_0_WP_DETECT_VALUE 1
+#endif
+// </e>
+
+// </e>
+
+#ifndef CONF_MCI_OS_SUPPORT
+#define CONF_MCI_OS_SUPPORT 0
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // CONF_SD_MMC_H

external/asf4-drivers/Config/hpl_gclk_config.h

@@ -387,7 +387,7 @@
 // <i> Indicates whether generic clock 5 configuration is enabled or not
 // <id> enable_gclk_gen_5
 #ifndef CONF_GCLK_GENERATOR_5_CONFIG
-#define CONF_GCLK_GENERATOR_5_CONFIG 0
+#define CONF_GCLK_GENERATOR_5_CONFIG 1
 #endif
 
 // <h> Generic Clock Generator Control
@@ -404,7 +404,7 @@
 // <i> This defines the clock source for generic clock generator 5
 // <id> gclk_gen_5_oscillator
 #ifndef CONF_GCLK_GEN_5_SOURCE
-#define CONF_GCLK_GEN_5_SOURCE GCLK_GENCTRL_SRC_GCLKGEN1
+#define CONF_GCLK_GEN_5_SOURCE GCLK_GENCTRL_SRC_DFLL
 #endif
 
 // <q> Run in Standby
@@ -446,15 +446,15 @@
 // <i> Indicates whether Generic Clock Generator Enable is enabled or not
 // <id> gclk_arch_gen_5_enable
 #ifndef CONF_GCLK_GEN_5_GENEN
-#define CONF_GCLK_GEN_5_GENEN 0
+#define CONF_GCLK_GEN_5_GENEN 1
 #endif
 // </h>
 
 //<h> Generic Clock Generator Division
 //<o> Generic clock generator 5 division <0x0000-0xFFFF>
 // <id> gclk_gen_5_div
 #ifndef CONF_GCLK_GEN_5_DIV
-#define CONF_GCLK_GEN_5_DIV 62
+#define CONF_GCLK_GEN_5_DIV 6
 #endif
 // </h>
 // </e>

external/asf4-drivers/Config/peripheral_clk_config.h

@@ -340,7 +340,7 @@
 
 // <i> Select the slow clock source.
 #ifndef CONF_GCLK_SERCOM5_SLOW_SRC
-#define CONF_GCLK_SERCOM5_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK2_Val
+#define CONF_GCLK_SERCOM5_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK4_Val
 #endif
 
 /**
@@ -356,7 +356,7 @@
  * \brief SERCOM5's Slow Clock frequency
  */
 #ifndef CONF_GCLK_SERCOM5_SLOW_FREQUENCY
-#define CONF_GCLK_SERCOM5_SLOW_FREQUENCY 12000000
+#define CONF_GCLK_SERCOM5_SLOW_FREQUENCY 32768
 #endif
 
 // <h> SDHC Clock Settings
@@ -389,7 +389,7 @@
 // <i> Select the clock source for SDHC.
 // <id> sdhc_gclk_selection
 #ifndef CONF_GCLK_SDHC0_SRC
-#define CONF_GCLK_SDHC0_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
+#define CONF_GCLK_SDHC0_SRC GCLK_PCHCTRL_GEN_GCLK5_Val
 #endif
 
 // <y> SDHC clock slow source
@@ -430,7 +430,7 @@
  * \brief SDHC's Clock frequency
  */
 #ifndef CONF_SDHC0_FREQUENCY
-#define CONF_SDHC0_FREQUENCY 48000000
+#define CONF_SDHC0_FREQUENCY 8000000
 #endif
 
 /**