1212# define __has_builtin (builtin ) 0
1313#endif
1414
15+ #ifdef _MSC_VER
16+ # define DEBUG_BREAK __debugbreak()
17+ #else
18+ # define DEBUG_BREAK asm("int3")
19+ #endif
20+
1521#if defined(__GCC_ASM_FLAG_OUTPUTS__ ) && \
1622 (defined(__i386 ) || defined(__x86_64__ ) || \
1723 defined(_M_IX86 ) || defined(_M_IX64 ))
@@ -331,17 +337,17 @@ bool arm_cpu_exception(arm_t *arm, arm_exception_number_t exc) {
331337 assert (exc > ARM_Thread_Mode &&
332338 exc < ARM_Invalid_Exception &&
333339 "Invalid exception" );
334- if (cpu -> active & 1 << exc ) {
340+ if (cpu -> active & UINT64_C ( 1 ) << exc ) {
335341 return false;
336342 }
337343 if (arm -> debug && exc == ARM_Exception_HardFault ) {
338- asm( "int3" ) ;
344+ DEBUG_BREAK ;
339345 }
340346 if (cpu -> exc ) {
341347 cpu -> exc = false;
342348 cpu -> pc = 0 ;
343349 if (arm -> debug ) {
344- asm( "int3" ) ;
350+ DEBUG_BREAK ;
345351 }
346352 return false;
347353 }
@@ -398,7 +404,7 @@ bool arm_cpu_exception(arm_t *arm, arm_exception_number_t exc) {
398404 }
399405 uint32_t pc = arm_mem_load_word (arm , cpu -> scb .vtor + (exc << 2 )) + 1 ;
400406 if (!pc || pc >= UINT32_C (0x80000000 )) {
401- asm( "int3" ) ;
407+ DEBUG_BREAK ; ;
402408 }
403409 if (!cpu -> exc ) {
404410 cpu -> exc = true;
@@ -418,7 +424,7 @@ bool arm_cpu_exception(arm_t *arm, arm_exception_number_t exc) {
418424 }
419425 cpu -> scb .icsr = (cpu -> scb .icsr & ~SCB_ICSR_VECTACTIVE_Msk ) |
420426 (exc & SCB_ICSR_VECTACTIVE_Msk ) << SCB_ICSR_VECTACTIVE_Pos ;
421- cpu -> active |= 1 << exc ;
427+ cpu -> active |= UINT64_C ( 1 ) << exc ;
422428 cpu -> pc = pc ;
423429 return true;
424430}
@@ -432,7 +438,7 @@ static void arm_cpu_interwork(arm_t *arm, uint32_t addr) {
432438 } else {
433439 // Exception Return
434440 uint32_t sp , val ;
435- assert (!~(addr | 0xF ) && cpu -> active & 1 << curexc &&
441+ assert (!~(addr | 0xF ) && cpu -> active & UINT64_C ( 1 ) << curexc &&
436442 "Unpredictable exception return" );
437443 cpu -> active &= ~(1 << curexc );
438444 switch (addr ) {
@@ -492,7 +498,7 @@ static void arm_cpu_interwork(arm_t *arm, uint32_t addr) {
492498 }
493499 cpu -> pc = arm_mem_load_word (arm , sp + 0x18 ) + 1 ;
494500 if (!cpu -> pc || cpu -> pc >= UINT32_C (0x80000000 )) {
495- asm( "int3" ) ;
501+ DEBUG_BREAK ;
496502 }
497503 assert (cpu -> pc & 1 && "Unpredictable exception return" );
498504 if (cpu -> exc ) {
@@ -530,7 +536,7 @@ void arm_cpu_execute(arm_t *arm) {
530536 arm_cpu_t * cpu = & arm -> cpu ;
531537 uint32_t icsr = cpu -> scb .icsr , pc = cpu -> pc - 2 , opc , val ;
532538 if (arm -> debug && pc >= UINT32_C (0x80000000 )) {
533- asm( "int3" ) ;
539+ DEBUG_BREAK ;
534540 }
535541 uint8_t i ;
536542 arm_exception_number_t curexc =
@@ -587,12 +593,12 @@ void arm_cpu_execute(arm_t *arm) {
587593 if (arm -> debug ) {
588594 fprintf (stderr , "PC %08X %04X\n" , pc , opc );
589595 if (!arm -> sync .slp ) {
590- asm( "int3" ) ;
596+ DEBUG_BREAK ;
591597 }
592598 //if (pc == UINT32_C(0x000010BC) ||
593599 // pc == UINT32_C(0x000010CA) ||
594600 // pc == UINT32_C(0x000010F6) ||
595- // pc == UINT32_C(0x00001104)) asm("int3") ;
601+ // pc == UINT32_C(0x00001104)) DEBUG_BREAK ;
596602 }
597603 switch (opc >> 12 & 0xF ) {
598604 case 0 :
@@ -1135,7 +1141,7 @@ void arm_cpu_execute(arm_t *arm) {
11351141 }
11361142 if (!cpu -> pc || cpu -> pc >= UINT32_C (0x80000000 ) ||
11371143 cpu -> pc - 2 == UINT32_C (0x00006A0C )) {
1138- asm( "int3" ) ;
1144+ DEBUG_BREAK ;
11391145 }
11401146 if (unlikely (cpu -> exc )) {
11411147 cpu -> exc = false;
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