[cheriot] If a R_RISCV_CHERI_CCALL reloc survives relaxation, remap it to CHERIOT compartment relocs. #113
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resistor
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Fixes #106 |
…t to CHERIOT compartment relocs. This is needed because Cheriot uses 11-bit shifts on AUIPCC (differing from normal RISC-V CHERI), and requires that the HI and LO relocs offset the target in the same direction. This is meant to be handled for all of Cheriot via R_RISCV_CHERIOT_COMPARTMENT_HI and R_RISCV_CHERIOT_COMPARTMENT_LO_I, but that is complicated by the simultaneous need to relax calls in (almost) all situations, which requires using R_RISCV_CHERI_CCALL. The solution is to preserve R_RISCV_CHERI_CCALL through relaxation, but then to remap it onto R_RISCV_CHERIOT_COMPARTMENT_HI / R_RISCV_CHERIOT_COMPARTMENT_LO_I during relocation. This gets us relaxation in the common case, and correct offsetting in the scenario where relaxation fails.
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Superseded by #114 |
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This is needed because Cheriot uses 11-bit shifts on AUIPCC (differing from normal RISC-V CHERI), and requires that the HI and LO relocs offset the target in the same direction. This is meant to be handled for all of Cheriot via R_RISCV_CHERIOT_COMPARTMENT_HI and R_RISCV_CHERIOT_COMPARTMENT_LO_I, but that is complicated by the simultaneous need to relax calls in (almost) all situations, which requires using R_RISCV_CHERI_CCALL.
The solution is to preserve R_RISCV_CHERI_CCALL through relaxation, but then to remap it onto R_RISCV_CHERIOT_COMPARTMENT_HI / R_RISCV_CHERIOT_COMPARTMENT_LO_I during relocation. This gets us relaxation in the common case, and correct offsetting in the scenario where relaxation fails.