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3 changes: 2 additions & 1 deletion clang/lib/Basic/Targets/RISCV.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -245,7 +245,7 @@ void RISCVTargetInfo::getTargetDefines(const LangOptions &Opts,
}

// Macros for use with the set and get permissions builtins.
if (getTriple().getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1) {
if (ISAInfo->hasExtension("xcheriot")) {
// Expose CHERI-compatible macros for permissions that overlap with other
// CHERI implementations.
Builder.defineMacro("__CHERI_CAP_PERMISSION_GLOBAL__", Twine(1 << 0));
Expand Down Expand Up @@ -379,6 +379,7 @@ bool RISCVTargetInfo::initFeatureMap(

if (getTriple().getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1) {
Features["xcheri"] = true;
Features["xcheriot"] = true;
Features["xcheripurecap"] = true;
Features["c"] = true;
Features["e"] = true;
Expand Down
5 changes: 0 additions & 5 deletions clang/test/CodeGen/cheri/cheriot-struct-ret.c
Original file line number Diff line number Diff line change
Expand Up @@ -808,8 +808,3 @@ __attribute__((cheri_compartment("example"))) void CheckOnePtr () {
// CHECK: ret void
return;
}


// CHECK: attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) "cheri-compartment"="example" "interrupt-state"="enabled" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+c,+e,+m,+xcheri,+xcheripurecap" }
// CHECK: attributes #1 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) "cheri-compartment"="example" "interrupt-state"="enabled" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+c,+e,+m,+xcheri,+xcheripurecap" }
// CHECK: attributes #2 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) "cheri-compartment"="example" "interrupt-state"="enabled" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+c,+e,+m,+xcheri,+xcheripurecap" }
Original file line number Diff line number Diff line change
Expand Up @@ -40,8 +40,3 @@ void func() {

// CHECK: declare void @doSomething(ptr addrspace(200) noundef) local_unnamed_addr addrspace(200) #2
// CHECK: declare void @doSomething2(ptr addrspace(200) noundef) local_unnamed_addr addrspace(200) #2

// CHECK: attributes #0 = { "cheriot_sealed_value" }
// CHECK: attributes #1 = { minsize nounwind optsize "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+c,+e,+m,+xcheri,+xcheripurecap" }
// CHECK: attributes #2 = { minsize optsize "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+c,+e,+m,+xcheri,+xcheripurecap" }
// CHECK: attributes #3 = { minsize nounwind optsize }
4 changes: 1 addition & 3 deletions llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -108,9 +108,7 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_RISCV_CHERI_CJAL;
case RISCV::fixup_riscv_ccall: {
const auto *STI = Ctx.getSubtargetInfo();
if (STI->hasFeature(RISCV::FeatureVendorXCheriot) ||
STI->getTargetTriple().getSubArch() ==
Triple::RISCV32SubArch_cheriot_v1)
if (STI->hasFeature(RISCV::FeatureVendorXCheriot))
return ELF::R_RISCV_CHERIOT_CCALL;
return ELF::R_RISCV_CHERI_CCALL;
}
Expand Down