CHERIoT-Platform · resistor · Aug 26, 2025 · Aug 25, 2025
diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp
@@ -377,15 +377,6 @@ bool RISCVTargetInfo::initFeatureMap(
     Features["32bit"] = true;
   }
 
-  if (getTriple().getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1) {
-    Features["xcheri"] = true;
-    Features["xcheriot"] = true;
-    Features["xcheripurecap"] = true;
-    Features["c"] = true;
-    Features["e"] = true;
-    Features["m"] = true;
-  }
-
   std::vector<std::string> AllFeatures = FeaturesVec;
   auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, FeaturesVec);
   if (!ParseResult) {
@@ -464,7 +455,7 @@ bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
     CapSize = XLen * 2;
   }
   if (ABI.empty())
-    ABI = ISAInfo->computeDefaultABI().str();
+    ABI = ISAInfo->computeDefaultABI(getTriple()).str();
 
   if (ISAInfo->hasExtension("zfh") || ISAInfo->hasExtension("zhinx"))
     HasLegalHalfType = true;

diff --git a/clang/lib/Basic/Targets/RISCV.h b/clang/lib/Basic/Targets/RISCV.h
@@ -84,7 +84,7 @@ class RISCVTargetInfo : public TargetInfo {
   bool HasExperimental = false;
 
 public:
-  RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
+  RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
       : TargetInfo(Triple) {
     BFloat16Width = 16;
     BFloat16Align = 16;
@@ -99,12 +99,6 @@ class RISCVTargetInfo : public TargetInfo {
     MCountName = "_mcount";
     HasFloat16 = true;
     HasStrictFP = true;
-
-    if (Triple.getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1) {
-      CPU = "cheriot";
-      ABI = (Triple.getOS() == llvm::Triple::CheriotRTOS) ? "cheriot"
-                                                          : "cheriot-baremetal";
-    }
   }
 
   bool setCPU(const std::string &Name) override {

diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -306,19 +306,11 @@ StringRef riscv::getRISCVABI(const ArgList &Args, const llvm::Triple &Triple) {
   // rv64e -> lp64e
   // rv64* -> lp64
   std::string Arch = getRISCVArch(Args, Triple);
-  if (Triple.getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1) {
-    llvm::Triple::OSType OS = Triple.getOS();
-    if (OS == llvm::Triple::CheriotRTOS)
-      return "cheriot";
-    else if (OS == llvm::Triple::UnknownOS)
-      return "cheriot-baremetal";
-  }
-
   auto ParseResult = llvm::RISCVISAInfo::parseArchString(
       Arch, /* EnableExperimentalExtension */ true);
   // Ignore parsing error, just go 3rd step.
   if (!llvm::errorToBool(ParseResult.takeError()))
-    return (*ParseResult)->computeDefaultABI();
+    return (*ParseResult)->computeDefaultABI(Triple);
 
   // 3. Choose a default based on the triple
   //
@@ -429,8 +421,7 @@ std::string riscv::getRISCVArch(const llvm::opt::ArgList &Args,
   // We deviate from GCC's defaults here:
   // - On `riscv{XLEN}-unknown-elf` we default to `rv{XLEN}imac`
   // - On all other OSs we use `rv{XLEN}imafdc` (equivalent to `rv{XLEN}gc`)
-  if (Triple.getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1 ||
-      Triple.getOS() == llvm::Triple::CheriotRTOS)
+  if (Triple.getOS() == llvm::Triple::CheriotRTOS)
     return "rv32emc_xcheriot";
   if (Triple.isRISCV32()) {
     if (Triple.getOS() == llvm::Triple::UnknownOS)
@@ -461,9 +452,13 @@ std::string riscv::getRISCVTargetCPU(const llvm::opt::ArgList &Args,
   if (!CPU.empty())
     return CPU;
 
-  if (Triple.getOS() == llvm::Triple::CheriotRTOS ||
-      Triple.getSubArch() == llvm::Triple::RISCV32SubArch_cheriot_v1)
+  if (Triple.getOS() == llvm::Triple::CheriotRTOS)
     return "cheriot";
+  if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) {
+    StringRef ABI = A->getValue();
+    if (ABI == "cheriot" || ABI == "cheriot-baremetal")
+      return "cheriot";
+  }
 
   return Triple.isRISCV64() ? "generic-rv64" : "generic-rv32";
 }
diff --git a/clang/test/CodeGen/cheri/cheri-mcu-atomic-libcall.c b/clang/test/CodeGen/cheri/cheri-mcu-atomic-libcall.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Wno-atomic-alignment" "-cheri-compartment=example" -S | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Wno-atomic-alignment" "-cheri-compartment=example" -S | FileCheck %s
 
 _Atomic(int) x;
 

diff --git a/clang/test/CodeGen/cheri/cheri-mcu-call-libcall.c b/clang/test/CodeGen/cheri/cheri-mcu-call-libcall.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
 #define LIBCALL __attribute__((cheriot_libcall))
 
 LIBCALL

diff --git a/clang/test/CodeGen/cheri/cheri-mcu-ccall.c b/clang/test/CodeGen/cheri/cheri-mcu-ccall.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
 
 // CHECK: define dso_local chericcallcce i32 @_Z5test2ii(i32 noundef %a0, i32 noundef %a1) local_unnamed_addr addrspace(200) #0
 __attribute__((cheriot_compartment("example"))) int test2(int a0, int a1) {

diff --git a/clang/test/CodeGen/cheri/cheri-mcu-interrupts.c b/clang/test/CodeGen/cheri/cheri-mcu-interrupts.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
 int foo(void);
 
 // CHECK: define dso_local i32 @disabled() local_unnamed_addr addrspace(200) #[[DIS:[0-9]]]

diff --git a/clang/test/CodeGen/cheri/cheriot-csetboundsrounddown.c b/clang/test/CodeGen/cheri/cheriot-csetboundsrounddown.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot-baremetal" "-target-feature" "+xcheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
 
 // CHECK-LABEL: define dso_local ptr addrspace(200) @foo
 // CHECK-SAME: (ptr addrspace(200) noundef readnone [[CAP:%.*]], i32 noundef [[B:%.*]]) local_unnamed_addr addrspace(200) #[[ATTR0:[0-9]+]] {

diff --git a/clang/test/CodeGen/cheri/cheriot-libcall-ptr-decay.c b/clang/test/CodeGen/cheri/cheriot-libcall-ptr-decay.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
 
 // CHECK-LABEL: define dso_local void @foo
 // CHECK-SAME: (ptr addrspace(200) nocapture noundef readonly [[BAR:%.*]]) local_unnamed_addr addrspace(200) #[[ATTR0:[0-9]+]] {

diff --git a/clang/test/CodeGen/cheri/cheriot-min-stack.c b/clang/test/CodeGen/cheri/cheriot-min-stack.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
 int foo(void);
 
 [[cheriot::minimum_stack(256)]]

diff --git a/clang/test/CodeGen/cheri/cheriot-strlen-builtin.c b/clang/test/CodeGen/cheri/cheriot-strlen-builtin.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
 unsigned __builtin_strlen(const char *str) __asm__("_Z6strlenPKc");
 
 long dynamic(const char *str) {

diff --git a/clang/test/CodeGen/cheri/cheriot-struct-ret.c b/clang/test/CodeGen/cheri/cheriot-struct-ret.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-O1" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-O1" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
 
 // Test that structs that can fit in two registers are correctly handled, both when used as return values and when passed as an argument. 
 

diff --git a/clang/test/CodeGen/cheri/cheriot-variadic.c b/clang/test/CodeGen/cheri/cheriot-variadic.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x | FileCheck %s
 
 typedef __builtin_va_list va_list;
 #define va_start(v, l) __builtin_va_start((v), l)

diff --git a/clang/test/CodeGen/cheri/riscv/cheriot-atomic-uintptr.c b/clang/test/CodeGen/cheri/riscv/cheriot-atomic-uintptr.c
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot-baremetal" "-target-feature" "+xcheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
 
 // Check that we can generate code for C11 atomic increment of uintptr
 

diff --git a/clang/test/CodeGen/cheri/riscv/cheriot-cap-import-attr.c b/clang/test/CodeGen/cheri/riscv/cheriot-cap-import-attr.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
 
 struct Uart {};
 

diff --git a/clang/test/CodeGen/cheri/riscv/cheriot-freestanding.c b/clang/test/CodeGen/cheri/riscv/cheriot-freestanding.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
 
 
 // CHECK: @memcpy

diff --git a/clang/test/CodeGen/cheri/riscv/cheriot-sealing-type-builtin.c b/clang/test/CodeGen/cheri/riscv/cheriot-sealing-type-builtin.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown-cheriotrtos" "-emit-llvm" "-cheri-compartment=static_sealing_test" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-O0" "-Werror" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown-cheriotrtos" "-emit-llvm" "-cheri-compartment=static_sealing_test" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-O0" "-Werror" -std=c2x | FileCheck %s
 
 
 struct StructSealingKey { };

diff --git a/clang/test/CodeGen/cheri/riscv/cheriot-setjmp.c b/clang/test/CodeGen/cheri/riscv/cheriot-setjmp.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-target-feature" "+xcheriot" -std=c2x | FileCheck %s
 // Verify that setjmp is called without cherilibcallcc
 struct __jmp_buf
 {

diff --git a/clang/test/CodeGen/cheri/riscv/cheriot-static-sealed-value-attr.c b/clang/test/CodeGen/cheri/riscv/cheriot-static-sealed-value-attr.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-unknown" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c2x | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-target-feature" "+xcheriot" -std=c2x | FileCheck %s
 
 // CHECK: %struct.__Sealed_SealedStructObj = type { i32, i32, %struct.SealedStructObj }
 // CHECK: %struct.SealedStructObj = type { i32 }

diff --git a/clang/test/CodeGenCXX/cheri/cheri-mcu-interrupts.cpp b/clang/test/CodeGenCXX/cheri/cheri-mcu-interrupts.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
+// RUN: %clang_cc1 %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" | FileCheck %s
 int foo(void);
 
 // CHECK: define dso_local noundef i32 @_Z8disabledv() local_unnamed_addr addrspace(200) #[[DIS:[0-9]]]

diff --git a/clang/test/CodeGenCXX/cheri/cheriot-libcall-ptr-decay.cpp b/clang/test/CodeGenCXX/cheri/cheriot-libcall-ptr-decay.cpp
@@ -1,5 +1,5 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
-// RUN: %clang_cc1 -xc++ %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" -std=c++17 | FileCheck %s
+// RUN: %clang_cc1 -xc++ %s -o - "-triple" "riscv32cheriot-unknown-cheriotrtos" "-emit-llvm" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" -std=c++17 | FileCheck %s
 
 // CHECK-LABEL: define dso_local void @_Z3fooPFvvE
 // CHECK-SAME: (ptr addrspace(200) nocapture noundef readonly [[BAR:%.*]]) local_unnamed_addr addrspace(200) #[[ATTR0:[0-9]+]] {

diff --git a/clang/test/Driver/cheri/cheriot.c b/clang/test/Driver/cheri/cheriot.c
@@ -1,13 +1,10 @@
-// RUN: %clang -target riscv32cheriot -### -c %s 2>&1 | FileCheck %s -check-prefixes BAREMETAL,ALL
-// RUN: %clang -target riscv32cheriot-unknown-unknown -### -c %s 2>&1 | FileCheck %s -check-prefixes BAREMETAL,ALL
+// RUN: %clang -target riscv32cheriot-unknown-unknown -mcpu=cheriot -### -c %s 2>&1 | FileCheck %s -check-prefixes BAREMETAL,ALL
+// RUN: %clang -target riscv32cheriot-unknown-unknown -mabi=cheriot-baremetal -### -c %s 2>&1 | FileCheck %s -check-prefixes BAREMETAL,ALL
 // RUN: %clang -target riscv32cheriot-unknown-cheriotrtos -### -c %s 2>&1 | FileCheck %s -check-prefixes RTOS,ALL
 
 
 // ALL: "-target-cpu" "cheriot"
-// ALL: "-target-feature" "+e"
-// ALL: "-target-feature" "+m"
-// ALL: "-target-feature" "+c"
-// ALL: "-target-feature" "+xcheri"
+// ALL: "-target-feature" "+xcheriot"
 
 // BAREMETAL: "-target-abi" "cheriot-baremetal"
 // RTOS: "-target-abi" "cheriot"
diff --git a/clang/test/Preprocessor/cheriot-feature-flags.c b/clang/test/Preprocessor/cheriot-feature-flags.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -E -dM -ffreestanding -triple riscv32cheriot-unknown-cheriotrtos < /dev/null | FileCheck %s 
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple riscv32cheriot-unknown-cheriotrtos "-target-abi" "cheriot" "-target-feature" "+xcheriot" < /dev/null | FileCheck %s 
 
 // CHECK: #define __CHERIOT_PERMISSION_ACCESS_SYSTEM_REGISTERS__ 128
 // CHECK: #define __CHERIOT_PERMISSION_EXECUTE__ 256

diff --git a/clang/test/Sema/cheri/attr-cheriot-sealed.c b/clang/test/Sema/cheri/attr-cheriot-sealed.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple riscv32cheriot -target-abi cheriot-baremetal -verify %s
+// RUN: %clang_cc1 -triple riscv32cheriot -target-abi cheriot-baremetal -target-feature +xcheriot -verify %s
 
 int * __sealed_capability test1(int * __sealed_capability a) {
     return a; // no error

diff --git a/clang/test/Sema/cheri/builtin-cheriot-sealed.c b/clang/test/Sema/cheri/builtin-cheriot-sealed.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple riscv32cheriot -target-abi cheriot-baremetal -verify %s
+// RUN: %clang_cc1 -triple riscv32cheriot -target-abi cheriot-baremetal -target-feature +xcheriot -verify %s
 
 void test(int * __sealed_capability sealed, int *unsealed) {
 	long num = 42;

diff --git a/clang/test/Sema/cheri/cheri-mcu-compartment-warns.c b/clang/test/Sema/cheri/cheri-mcu-compartment-warns.c
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 %s -o - -triple riscv32cheriot-unknown-cheriotrtos -emit-llvm -mframe-pointer=none -mcmodel=small -target-abi cheriot -Oz -Werror -verify=libcall
-// RUN: %clang_cc1 %s -o - -triple riscv32cheriot-unknown-cheriotrtos -emit-llvm -mframe-pointer=none -mcmodel=small -target-abi cheriot -Oz -Werror -verify=wrong-compartment -cheri-compartment=wrong
+// RUN: %clang_cc1 %s -o - -triple riscv32cheriot-unknown-cheriotrtos -emit-llvm -mframe-pointer=none -mcmodel=small -target-abi cheriot -target-feature +xcheriot -Oz -Werror -verify=libcall
+// RUN: %clang_cc1 %s -o - -triple riscv32cheriot-unknown-cheriotrtos -emit-llvm -mframe-pointer=none -mcmodel=small -target-abi cheriot -target-feature +xcheriot -Oz -Werror -verify=wrong-compartment -cheri-compartment=wrong
 
 __attribute__((cheriot_libcall))
 int add(int a, int b) // wrong-compartment-error{{CHERI libcall exported from compilation unit for compartment 'wrong' (provided with -cheri-compartment=)}}

diff --git a/clang/test/Sema/cheri/cheriot-get-minimum-stack.c b/clang/test/Sema/cheri/cheriot-get-minimum-stack.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 "-triple" "riscv32cheriot-unknown-cheriotrtos" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x -o - %s -fsyntax-only -verify
+// RUN: %clang_cc1 "-triple" "riscv32cheriot-unknown-cheriotrtos" "-mframe-pointer=none" "-mcmodel=small" "-target-abi" "cheriot" "-target-feature" "+xcheriot" "-Oz" "-Werror" "-cheri-compartment=example" -std=c2x -o - %s -fsyntax-only -verify
 
 __attribute__((cheri_compartment("example")))
 int readback(void)

diff --git a/clang/test/SemaCXX/cheri/attr-cheriot-sealed.cpp b/clang/test/SemaCXX/cheri/attr-cheriot-sealed.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -std=c++11 -triple riscv32cheriot -verify %s
+// RUN: %clang_cc1 -std=c++11 -triple riscv32cheriot-unknown-cheriotrtos -target-feature +xcheriot -verify %s
 
 struct test_struct {
     int b;

diff --git a/lld/test/ELF/cheri/riscv/cheriot_compartment_lo_i.s b/lld/test/ELF/cheri/riscv/cheriot_compartment_lo_i.s
@@ -4,7 +4,7 @@
 # RUN: llvm-objdump -d %t.exe | FileCheck %s
 
 	.attribute	4, 16
-	.attribute	5, "rv32e2p0_m2p0_c2p0_zmmul1p0_xcheri0p0_xcheriot1p0_xcheripurecap1p0"
+	.attribute	5, "rv32e2p0_m2p0_c2p0_zmmul1p0_xcheri0p0_xcheriot1p0_xcheripurecap0p0"
 	.section	.text,"ax",@progbits
 	.globl	_start
 	.p2align	1

diff --git a/llvm/include/llvm/TargetParser/RISCVISAInfo.h b/llvm/include/llvm/TargetParser/RISCVISAInfo.h
@@ -21,6 +21,8 @@
 
 namespace llvm {
 
+class Triple;
+
 class RISCVISAInfo {
 public:
   RISCVISAInfo(const RISCVISAInfo &) = delete;
@@ -66,7 +68,7 @@ class RISCVISAInfo {
 
   bool hasExtension(StringRef Ext) const;
   std::string toString() const;
-  StringRef computeDefaultABI() const;
+  StringRef computeDefaultABI(const llvm::Triple &Triple) const;
 
   static bool isSupportedExtensionFeature(StringRef Ext);
   static bool isSupportedExtension(StringRef Ext);

diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
@@ -92,14 +92,11 @@ ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,
   auto ISAInfo = RISCVFeatures::parseFeatureBits(IsRV64, FeatureBits);
   if (!ISAInfo)
     report_fatal_error(ISAInfo.takeError());
-  return getTargetABI((*ISAInfo)->computeDefaultABI(), TT);
+  return getTargetABI((*ISAInfo)->computeDefaultABI(TT), TT);
 }
 
 ABI getTargetABI(StringRef ABIName, const Triple &TT) {
   ABI Default = ABI_Unknown;
-  if (TT.getSubArch() == Triple::RISCV32SubArch_cheriot_v1) {
-    Default = (TT.getOS() == Triple::CheriotRTOS) ? ABI_CHERIOT : ABI_CHERIOT_BAREMETAL;
-  }
 
   auto TargetABI = StringSwitch<ABI>(ABIName)
                        .Case("ilp32", ABI_ILP32)

diff --git a/llvm/lib/TargetParser/RISCVISAInfo.cpp b/llvm/lib/TargetParser/RISCVISAInfo.cpp
@@ -13,6 +13,7 @@
 #include "llvm/Support/Errc.h"
 #include "llvm/Support/Error.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/Triple.h"
 
 #include <array>
 #include <atomic>
@@ -955,10 +956,11 @@ RISCVISAInfo::postProcessAndChecking(std::unique_ptr<RISCVISAInfo> &&ISAInfo) {
   return std::move(ISAInfo);
 }
 
-StringRef RISCVISAInfo::computeDefaultABI() const {
+StringRef RISCVISAInfo::computeDefaultABI(const llvm::Triple &Triple) const {
   if (XLen == 32) {
     if (Exts.count("xcheriot"))
-      return "cheriot";
+      return Triple.getOS() == llvm::Triple::CheriotRTOS ? "cheriot"
+                                                         : "cheriot-baremetal";
     if (Exts.count("e"))
       return "ilp32e";
     if (Exts.count("d"))