Remove DataDepGraph's latency precision member

This member was only used in a particular subclass, so it should belong
to that subclass.

Author: Quincunx271

include/opt-sched/Scheduler/data_dep.h

@@ -173,7 +173,7 @@ class DataDepGraph : public llvm::opt_sched::OptSchedDDGWrapperBase,
                      public DirAcycGraph,
                      public DataDepStruct {
 public:
-  DataDepGraph(MachineModel *machMdl, LATENCY_PRECISION ltncyPcsn);
+  DataDepGraph(MachineModel *machMdl);
   virtual ~DataDepGraph();
 
   // Reads the data dependence graph from a text file.
@@ -367,7 +367,6 @@ class DataDepGraph : public llvm::opt_sched::OptSchedDDGWrapperBase,
   int entryInstCnt_;
   int exitInstCnt_;
 
-  LATENCY_PRECISION ltncyPrcsn_;
   int edgeCntPerLtncy_[MAX_LATENCY_VALUE + 1];
 
   // Tracks all registers in the scheduling region. Each RegisterFile

lib/Scheduler/data_dep.cpp

@@ -144,8 +144,7 @@ InstCount DataDepStruct::CmputAbslutUprBound_() {
   return schedUprBound_;
 }
 
-DataDepGraph::DataDepGraph(MachineModel *machMdl, LATENCY_PRECISION ltncyPrcsn)
-    : DataDepStruct(machMdl) {
+DataDepGraph::DataDepGraph(MachineModel *machMdl) : DataDepStruct(machMdl) {
   int i;
 
   type_ = DGT_FULL;
@@ -154,7 +153,6 @@ DataDepGraph::DataDepGraph(MachineModel *machMdl, LATENCY_PRECISION ltncyPrcsn)
   weight_ = 1.0;
   outptDags_ = ODG_ALL;
   maxOutptDagSize_ = 1000;
-  ltncyPrcsn_ = ltncyPrcsn;
   includesCall_ = false;
   includesUnpipelined_ = false;
 

lib/Wrapper/OptSchedDDGWrapperBasic.cpp

@@ -52,8 +52,8 @@ OptSchedDDGWrapperBasic::OptSchedDDGWrapperBasic(
     MachineSchedContext *Context, ScheduleDAGOptSched *DAG,
     OptSchedMachineModel *MM, LATENCY_PRECISION LatencyPrecision,
     const std::string &RegionID)
-    : DataDepGraph(MM, LatencyPrecision), MM(MM), Contex(Context), DAG(DAG),
-      RTFilter(nullptr) {
+    : DataDepGraph(MM), MM(MM), Contex(Context), DAG(DAG),
+      LatencyPrecision(LatencyPrecision), RTFilter(nullptr) {
   dagFileFormat_ = DFF_BB;
   isTraceFormat_ = false;
   TreatOrderDepsAsDataDeps =
@@ -447,11 +447,14 @@ void OptSchedDDGWrapperBasic::convertEdges(const SUnit &SU,
     }
 
     int16_t Latency;
-    if (ltncyPrcsn_ == LTP_PRECISE) { // get latency from the machine model
+    switch (LatencyPrecision) {
+    case LTP_PRECISE: { // get latency from the machine model
       const auto &InstName = DAG->TII->getName(instr->getOpcode());
       const auto &InstType = MM->GetInstTypeByName(InstName);
       Latency = MM->GetLatency(InstType, DepType);
-    } else if (ltncyPrcsn_ == LTP_ROUGH) { // rough latency = llvm latency
+      break;
+    }
+    case LTP_ROUGH: { // rough latency = llvm latency
       Latency = I->getLatency();
       // If latency is above a specified target then reduce the latency
       // by the specified divisor
@@ -468,12 +471,16 @@ void OptSchedDDGWrapperBasic::convertEdges(const SUnit &SU,
         Logger::Event("ReduceLatency", "FromInstruction", InstFromName.c_str(),
                       "ToInstruction", InstToName.c_str(), "OriginalLatency",
                       OldLatency, "NewLatency", Latency);
+        break;
       }
-    } else
+    }
+    case LTP_UNITY:
       Latency = 1; // unit latency = ignore ilp
 
-    CreateEdge_(SU.NodeNum, I->getSUnit()->NodeNum, Latency, DepType,
-                IsArtificial);
+      CreateEdge_(SU.NodeNum, I->getSUnit()->NodeNum, Latency, DepType,
+                  IsArtificial);
+      break;
+    }
   }
 }