feat: Add Parity Generator component

[Nakshatra480]

Fixes #586

Describe the changes you have made in this PR -

I've added a new ParityGenerator component to the simulator. This module implements standard odd parity logic, where the output is high (1) if the number of high inputs is odd.

Key changes include:

• New Module: Created src/simulator/src/modules/ParityGenerator.js which extends CircuitElement.
• Logic: Implemented the parity check using standard XOR operations across all input nodes.
• Integration: Registered the new module in moduleSetup.js so it appears in the simulator's module list.
• Testing: Added src/simulator/spec/parityGenerator.spec.js with unit tests covering initialization, bit width verification, and logic correctness for both odd and even input counts.

Screenshots of the UI changes (If any) -

(The component renders as a standard rectangular circuit element with the label "Parity")

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Code Understanding and AI Usage

Did you use AI assistance (ChatGPT, Claude, Copilot, etc.) to write any part of this code?

• No, I wrote all the code myself
• Yes, I used AI assistance (continue below)

If you used AI assistance:

• I have reviewed every single line of the AI-generated code
• I can explain the purpose and logic of each function/component I added
• I have tested edge cases and understand how the code handles them
• I have modified the AI output to follow this project's coding standards and conventions

Explain your implementation approach:

The simulator was missing a dedicated Parity Generator, which is a fundamental digital logic component.

My implementation approach was to extend the base CircuitElement class to ensure full compatibility with the existing rendering and simulation engine.

• Core Logic: I chose to implement the resolve() method by iterating through the input nodes and applying an XOR operation (result ^= input). This is the standard definition of odd parity and scales efficiently with any number of inputs.
• Customization: The component supports dynamic input sizes (defaulting to 3), which is handled in the constructor and changeInputSize method.
• Verilog Support: I also implemented generateVerilog() to map this component to the ^ (XOR) operator in Verilog export, ensuring designs using this component can be exported correctly.

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Checklist before requesting a review

• I have added proper PR title and linked to the issue
• I have performed a self-review of my code
• I can explain the purpose of every function, class, and logic block I added
• I understand why my changes work and have tested them thoroughly
• I have considered potential edge cases and how my code handles them
• If it is a core feature, I have added thorough tests
• My code follows the project's style guidelines and conventions

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[coderabbitai]

Walkthrough

This pull request adds a new ParityGenerator module to the simulator. It introduces a ParityGenerator class (extending CircuitElement) that creates configurable input nodes and a single output, computes parity (output is 1 when an odd number of inputs are 1), implements customSave, resolve, customDraw, and generateVerilog, and sets prototype metadata. The module is exported and registered in moduleSetup and added to simulator metadata. A Vitest spec (src/simulator/spec/parityGenerator.spec.js) tests initialization and 3-/4-input parity behavior.

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Docstring Coverage	⚠️ Warning	Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%.	Write docstrings for the functions missing them to satisfy the coverage threshold.

✅ Passed checks (4 passed)

Check name	Status	Explanation
Title check	✅ Passed	Title accurately and concisely describes the main change: addition of a Parity Generator component to the circuit simulator.
Linked Issues check	✅ Passed	PR fully implements requirements from #586: configurable Even Parity Generator with XOR-based logic, UI integration, and comprehensive test coverage.
Out of Scope Changes check	✅ Passed	All changes are directly related to adding the ParityGenerator component; no extraneous modifications detected beyond the scope of #586.
Description Check	✅ Passed	Check skipped - CodeRabbit’s high-level summary is enabled.

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✨ Finishing touches

• 📝 Generate docstrings

🧪 Generate unit tests (beta)

• Create PR with unit tests
• Post copyable unit tests in a comment

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[coderabbitai]

Actionable comments posted: 1

🤖 Fix all issues with AI agents

In `@src/simulator/src/metadata.ts`:
- Around line 63-64: The ParityGenerator currently implements odd parity but
issue `#586` requires even parity; update the ParityGenerator implementation so
its output bit makes the total count of 1s even (i.e., invert the existing
XOR-chain result or use XNOR logic), or alternatively add a configurable
parityMode property on ParityGenerator (e.g., "even" | "odd") and ensure
downstream code that constructs/uses ParityGenerator honors that flag; update
any tests or metadata entries referencing ParityGenerator to reflect the chosen
convention.

[Nakshatra480]

Hi @Nihal4777 @tachyons parity generator feature is added, pls review this PR.
Thanks for your time

[naman79820]

@Nakshatra480 please fill in the PR description as per the template. Thanks!

[Nakshatra480]

@naman79820 now is it ok?
thanks for your time