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lib/src/main/scala/dfhdl/tools/toolsCore Expand file tree Collapse file tree 1 file changed +6
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lines changed Original file line number Diff line number Diff line change @@ -36,8 +36,12 @@ trait QuestaSimCommon extends Linter, Simulator:
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MemberGetSet
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): Unit =
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val work = new java.io.File (s " ${execPath}${separatorChar}work ${separatorChar}_info " )
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- if (! work.exists())
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- Process (" vlib work" , new java.io.File (execPath)).!
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+ // TODO: currently removing the existing work library info file, because when compiling both vhdl and verilog to
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+ // the same work library, there are weird errors that happen (seen in AES.CipherSim). in the future, maybe a better
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+ // way is to have a different work library for each language/dialect
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+ if (work.exists())
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+ work.delete()
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+ Process (" vlib work" , new java.io.File (execPath)).!
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override protected def simRunExec (using MemberGetSet ): String =
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if (osIsWindows) " vsimk.exe" else " vsimk"
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