Pmod bridge: Fix the disabled bottom row bug

hierarchies/PmodAD1/README.txt

@@ -1,8 +1,9 @@
 Hierarchy Port Requirements
----------------------------
-* `s_axi_aclk`: In order to generate a SPI clock of an appropriate frequency, the PmodAD1 hierarchy must be provided with a clock with a frequency of approximately 100 MHz. Clocks of different frequencies can be used, providing that care is taken to correctly set the PmodAD1_AXI module's parameters.
+* s_axi_aclk: 100 MHz
+Clocks of different frequencies can be used, provided that care is taken to correctly
+set the PmodAD1_AXI module parameters
 
 Constraints
------------
-* When using the Board Flow, no additional constraints are required.
-* When not using the Board Flow, template constraints for the Pmod_out port can be found in the imported "PmodAD1_*.xdc" file.
+* When using the Board Flow, no additional constraints are required
+* When not using the Board Flow, template constraints for the Pmod_out port can be found in
+the imported PmodAD1_*.xdc file

hierarchies/PmodAD1/create_hier.tcl

@@ -54,3 +54,9 @@ file delete -force $tempdir
 # call the process created in the bd.tcl script. recreates the described hierarchy
 source -notrace [file join $script_dir "bd.tcl"]
 create_hier_cell_${pmod}_* / $nameHier
+
+# add README.txt text to the project as a comment attached to the hierarchy
+set fp [open [file join $script_dir "README.txt"] r]
+set comment_text [read $fp]
+close $fp
+set_property USER_COMMENTS.readme $comment_text [get_bd_cells $nameHier/pmod_bridge_0]

hierarchies/PmodHYGRO/bd.tcl

@@ -185,7 +185,7 @@ proc create_hier_cell_PmodHYGRO_0 { parentCell nameHier } {
    CONFIG.PMOD {Custom} \
    CONFIG.Top_Row_Interface {I2C} \
    CONFIG.USE_BOARD_FLOW {true} \
-   CONFIG.USE_PULLUPS {true} \
+   CONFIG.Use_Pullups_Top_Row {true} \
  ] $pmod_bridge_0
 
   # Create interface connections

hierarchies/PmodToF/README.txt

@@ -10,7 +10,8 @@ Hierarchy Requirements
 
 Hierarchy Port Requirements
 ---------------------------
-* IIC clock frequency 100KHz
+* s_axi_aclk: The AXI IIC IP core requires that the AXI clock frequency be at least 25 MHz and 25 times faster than the SCL clock frequency.
+Since the ToF requires an IIC SCL clock frequency of 100KHz, s_axi_aclk's frequency must be at least 25 MHz.
 
 Constraints
 -----------

ip/Pmods/Pmod_Bridge_v1_1/.gitignore → ip/Pmods/Pmod_Bridge_v1_3/.gitignore

@@ -11,7 +11,7 @@ gui/*
 
 !xgui
 xgui/*
-!xgui/pmod_bridge_v1_1.tcl
+!xgui/pmod_bridge_v1_3.tcl
 
 !utils
 util/*