Merge branch 'hotfix/condition-fpga-programming'

Author: lleon95

include/cynq/dma/datamover.hpp

@@ -42,7 +42,9 @@ class DMADataMover : public IDataMover {
    * This constructs a data mover that uses DMA to execute the transfers
    * between the host and the device. Moreover, it uses XRT buffer object as
    * memory buffers.
-   * @param addr DMA address in the physical memory map
+   * @param addr DMA address in the physical memory map. if 0, DMA engine for
+   * AXI Stream is not instantiated but the memory map functionality will still
+   * work.
    * @param hwparams Hardware-specific params
    */
   DMADataMover(const uint64_t addr,

include/cynq/hardware.hpp

@@ -70,8 +70,9 @@ class IHardware {
    *
    * @param address a unsigned integer of 64 bits representing an address.
    * In the case of ZYNQ boards, it corresponds to the base address of the
-   * accelerator BAR (Bank Address Register). In the case of Alveo boards,
-   * it is unused.
+   * accelerator BAR (Bank Address Register). In the case of Alveo boards or
+   * already configured devices (UltraScale default construction), it is
+   * unused.
    *
    * @return std::shared_ptr<IDataMover>
    * Returns an IDataMover pointer with reference counting. It should be
@@ -208,5 +209,22 @@ class IHardware {
    */
   static std::shared_ptr<IHardware> Create(const HardwareArchitecture hw,
                                            const std::string &config);
+
+  /**
+   * @brief Create method
+   * Factory method to create a hardware-specific subclasses for accelerators
+   * and data movers. The configuration of the FPGA is not performed by using
+   * this constructor, since this assumes that there is none bitstream to load.
+   *
+   * @param hw One of the values in the HardwareArchitecture enum class
+   * present in the enums.hpp file that should correspond to the device being
+   * used.
+   *
+   * @return std::shared_ptr<IHardware>
+   * Returns an IAccelerator pointer with reference counting. It should be
+   * thread-safe.
+   *
+   */
+  static std::shared_ptr<IHardware> Create(const HardwareArchitecture hw);
 };
 }  // namespace cynq

include/cynq/ultrascale/hardware.hpp

@@ -86,9 +86,12 @@ class UltraScale : public IHardware {
    */
   UltraScale(const std::string &bitstream_file, const std::string &xclbin_file);
   /**
-   * No default constructor required
+   * @brief Construct a new UltraScale object
+   *
+   * Configure the hardware platform without loading a bitstream nor xclbin.
+   * This is useful for already configured FPGAs.
    */
-  UltraScale() = delete;
+  UltraScale();
   /**
    * @brief ~UltraScale destructor method
    * Destroy the UltraScale object.

meson.build

@@ -7,7 +7,7 @@
 #
 
 
-project('cynq',['c','cpp'],version : '0.2.0',
+project('cynq',['c','cpp'],version : '0.3.1',
   default_options : ['warning_level=3',
                      'cpp_std=c++17',
                      'cpp_args=-Werror'])

src/cynq/dma/datamover.cpp

@@ -47,7 +47,9 @@ DMADataMover::DMADataMover(const uint64_t addr,
   params->hw_params_ = hwparams;
 
   /* Create the DMA accessor */
-  PYNQ_openDMA(&params->dma_, addr);
+  if (static_cast<uint64_t>(0ul) != addr) {
+    PYNQ_openDMA(&params->dma_, addr);
+  }
 }
 
 std::shared_ptr<IMemory> DMADataMover::GetBuffer(const size_t size, const int,
@@ -95,7 +97,9 @@ DMADataMover::~DMADataMover() {
   /* The assumption is that at this point, it is ok */
   auto params =
       dynamic_cast<DMADataMoverParameters *>(data_mover_params_.get());
-  PYNQ_closeDMA(&params->dma_);
+  if (static_cast<uint64_t>(0ul) != params->addr_) {
+    PYNQ_closeDMA(&params->dma_);
+  }
 }
 
 /* TODO: All implementations below can be implemented cleverly. However, it
@@ -126,23 +130,25 @@ Status DMADataMover::Upload(const std::shared_ptr<IMemory> mem,
     meta->bo_->sync(XCL_BO_SYNC_BO_TO_DEVICE, size, offset);
   }
 
-  /* Get device pointer */
-  std::shared_ptr<uint8_t> ptr = mem->DeviceAddress<uint8_t>();
-  if (!ptr) {
-    return Status{Status::INVALID_PARAMETER, "Device pointer is null"};
-  }
-
   /* Issue transaction */
-  PYNQ_SHARED_MEMORY pmem;
-  pmem.physical_address = (uint64_t)(ptr.get());  // NOLINT
-  pmem.pointer = nullptr;
+  if (static_cast<uint64_t>(0ul) != params->addr_) {
+    /* Get device pointer */
+    std::shared_ptr<uint8_t> ptr = mem->DeviceAddress<uint8_t>();
+    if (!ptr) {
+      return Status{Status::INVALID_PARAMETER, "Device pointer is null"};
+    }
 
-  ret =
-      PYNQ_issueDMATransfer(&params->dma_, &pmem, offset, size, AXI_DMA_WRITE);
+    PYNQ_SHARED_MEMORY pmem;
+    pmem.physical_address = (uint64_t)(ptr.get());  // NOLINT
+    pmem.pointer = nullptr;
 
-  /* Check transaction */
-  if (PYNQ_SUCCESS != ret) {
-    return Status{Status::REGISTER_IO_ERROR, "Cannot issue the transfer"};
+    ret = PYNQ_issueDMATransfer(&params->dma_, &pmem, offset, size,
+                                AXI_DMA_WRITE);
+
+    /* Check transaction */
+    if (PYNQ_SUCCESS != ret) {
+      return Status{Status::REGISTER_IO_ERROR, "Cannot issue the transfer"};
+    }
   }
 
   /* Synchronise if needed */
@@ -177,21 +183,25 @@ Status DMADataMover::Download(const std::shared_ptr<IMemory> mem,
     meta->bo_->sync(XCL_BO_SYNC_BO_FROM_DEVICE, size, offset);
   }
 
-  /* Get device pointer */
-  std::shared_ptr<uint8_t> ptr = mem->DeviceAddress<uint8_t>();
-  if (!ptr) {
-    return Status{Status::INVALID_PARAMETER, "Device pointer is null"};
-  }
-
   /* Issue transaction */
-  PYNQ_SHARED_MEMORY pmem;
-  pmem.physical_address = (uint64_t)(ptr.get());  // NOLINT
-  pmem.pointer = nullptr;
-  ret = PYNQ_issueDMATransfer(&params->dma_, &pmem, offset, size, AXI_DMA_READ);
+  if (static_cast<uint64_t>(0ul) != params->addr_) {
+    std::shared_ptr<uint8_t> ptr = mem->DeviceAddress<uint8_t>();
 
-  /* Check transaction */
-  if (PYNQ_SUCCESS != ret) {
-    return Status{Status::REGISTER_IO_ERROR, "Cannot issue the transfer"};
+    /* Get device pointer */
+    if (!ptr) {
+      return Status{Status::INVALID_PARAMETER, "Device pointer is null"};
+    }
+
+    PYNQ_SHARED_MEMORY pmem;
+    pmem.physical_address = (uint64_t)(ptr.get());  // NOLINT
+    pmem.pointer = nullptr;
+    ret =
+        PYNQ_issueDMATransfer(&params->dma_, &pmem, offset, size, AXI_DMA_READ);
+
+    /* Check transaction */
+    if (PYNQ_SUCCESS != ret) {
+      return Status{Status::REGISTER_IO_ERROR, "Cannot issue the transfer"};
+    }
   }
 
   /* Synchronise if needed */
@@ -203,11 +213,15 @@ Status DMADataMover::Download(const std::shared_ptr<IMemory> mem,
 }
 
 Status DMADataMover::Sync(const SyncType type) {
-  int ret = PYNQ_SUCCESS;
-
   auto params =
       dynamic_cast<DMADataMoverParameters *>(data_mover_params_.get());
 
+  if (static_cast<uint64_t>(0ul) == params->addr_) {
+    return Status{};
+  }
+
+  int ret = PYNQ_SUCCESS;
+
   if (SyncType::HostToDevice == type) {
     ret = PYNQ_waitForDMAComplete(&params->dma_, AXI_DMA_WRITE);
   } else {

src/cynq/hardware.cpp

@@ -38,6 +38,15 @@ std::shared_ptr<IHardware> IHardware::Create(const HardwareArchitecture hw,
   }
 }
 
+std::shared_ptr<IHardware> IHardware::Create(const HardwareArchitecture hw) {
+  switch (hw) {
+    case HardwareArchitecture::UltraScale:
+      return std::make_shared<UltraScale>();
+    default:
+      return nullptr;
+  }
+}
+
 std::shared_ptr<IExecutionGraph> IHardware::GetExecutionStream(
     const std::string& name, const IExecutionGraph::Type type,
     const std::shared_ptr<ExecutionGraphParameters> params) {

src/cynq/ultrascale/hardware.cpp

@@ -126,6 +126,23 @@ UltraScale::UltraScale(const std::string &bitstream_file,
   GetClocksInformation();
 }
 
+UltraScale::UltraScale()
+    : parameters_{std::make_shared<UltraScaleParameters>()} {
+  /* For the UltraScale, there is only a single device. It is possible to
+     load either a bitstream or a xclbin. */
+  Status st{};
+
+  /* Configure the buses accordingly to the default design */
+  st = LoadXclBin(EXAMPLE_KRIA_DEFAULT_XCLBIN_LOCATION);
+  if (st.code != Status::OK) {
+    std::string msg = "Error while configuring the buses: ";
+    msg += st.msg;
+    throw std::runtime_error(msg);
+  }
+
+  GetClocksInformation();
+}
+
 Status UltraScale::LoadBitstream(const std::string &bitstream_file) {
   /* FIXME: This is a temporal implementation while we are coding our own
      implementation. Use with caution */