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feat(decode): implement xori ori andi addiw
1 parent dcb3540 commit 6ee1265

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sim/src/decode.c

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -92,8 +92,11 @@ void decode_exec(Decode *s){
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INSTPAT("0000000 ????? ????? 001 ????? 00110 11", slliw , I, R(rd) = SEXT((uint32_t)src1 << (imm & 0x1f), 32));
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INSTPAT("0000000 ????? ????? 101 ????? 00110 11", srliw , I, R(rd) = SEXT((uint32_t)src1 >> (imm & 0x1f), 32));
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INSTPAT("0100000 ????? ????? 101 ????? 00110 11", sraiw , I, R(rd) = SEXT((int32_t)src1 >> (imm & 0x1f), 32));
95-
// XORI, ORI, ANDI
96-
// ADDIW
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// XORI, ORI, ANDI, ADDIW
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INSTPAT("??????? ????? ????? 100 ????? 00100 11", xori , I, R(rd) = src1 ^ imm);
97+
INSTPAT("??????? ????? ????? 110 ????? 00100 11", ori , I, R(rd) = src1 | imm);
98+
INSTPAT("??????? ????? ????? 111 ????? 00100 11", andi , I, R(rd) = src1 & imm);
99+
INSTPAT("??????? ????? ????? 000 ????? 00110 11", addiw , I, R(rd) = SEXT((int32_t)src1 + (int32_t)imm, 32));
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// ADD, SUB, SLL, SLT, SLTU, XOR, SRL, SRA, OR, AND
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// ADDW, SUBW, SLLW, SRLW, SRAW
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// FENCE, FENCE.I

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