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Fix SEC_STAT.IRM bit handling in ARC SEM interrupt entry/exit #1179

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Fix SEC_STAT.IRM bit handling in ARC SEM interrupt entry/exit #1179

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7 changes: 7 additions & 0 deletions portable/ThirdParty/GCC/ARC_EM_HS/arc_support.s
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Original file line number Diff line number Diff line change
Expand Up @@ -239,6 +239,9 @@ exc_entry_int:
mov blink, sp

clri /* disable interrupt */
lr r0, [AUX_SEC_STAT]
and r0, r0, 0x8
PUSH r0
ld r3, [exc_nest_count]
add r2, r3, 1
st r2, [exc_nest_count]
Expand Down Expand Up @@ -294,6 +297,8 @@ ret_int:
brne r0, 0, ret_int_2
ret_int_1: /* return from non-task context */
INTERRUPT_EPILOGUE
POP r0
sflag r0
rtie
/* there is a dispatch request */
ret_int_2:
Expand All @@ -319,6 +324,8 @@ ret_int_r:
RESTORE_CALLEE_REGS /* recover registers */
POPAX AUX_IRQ_ACT
INTERRUPT_EPILOGUE
POP r0
sflag r0
rtie

#if ARC_FEATURE_FIRQ == 1
Expand Down