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1. cvw cvw Public

   Forked from openhwgroup/cvw

   CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…

   SystemVerilog

2. cvw-arch-verif cvw-arch-verif Public

   Forked from openhwgroup/cvw-arch-verif

   The purpose of the repo is to support CORE-V Wally architectural verification

   SystemVerilog

3. hmc-e155-portfolio hmc-e155-portfolio Public

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4. e155-lab1 e155-lab1 Public

   FPGA and MCU Setup

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5. e155-lab2 e155-lab2 Public

   Code for Lab 2

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6. e155-lab3 e155-lab3 Public

   SystemVerilog