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Arty Board Examples

Julian Kemmerer edited this page Nov 4, 2020 · 30 revisions

These examples have been crafted for the Digilent Arty Artix-35T board. If you want support for another board or have any questions at all feel free to reach out and ask!

Table of Contents

PipelineC -> Bitstream

  1. Clone the PipelineC git repo which includes the Arty example files.
  2. Follow the running the PipelineC tool steps to generate VHDL.
  3. Uncomment ports from examples/arty/Arty-A7-35-Master.xdc and add/connect port wires as needed in examples/arty/board.vhd.
  4. Run Vivado as normal (click Generate Bitstream).

Blinking LEDs

The source for this example can be found here. Please see a full break down of the blinking leds example here.

UART Loopback

The source for this example can be found here. A full break down of PipelineC results can be found here.

DDR3 UART Loopback

An example storing UART messages in DDR memory and then reading those messages back - DDR loopback. Includes test driver C code as well.

Ethernet Packets

A UDP packet loopback example is here. Is is kinda old at this point but willing to revive it! It uses a free trial, ultimately paid, Xilinx TEMAC core - would like to get rid of that.

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