Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
36 changes: 29 additions & 7 deletions lib/SPIRV/libSPIRV/SPIRVModule.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1855,20 +1855,42 @@ SPIRVInstruction *SPIRVModuleImpl::addSelectionMergeInst(
SPIRVInstruction *SPIRVModuleImpl::addLoopMergeInst(
SPIRVId MergeBlock, SPIRVId ContinueTarget, SPIRVWord LoopControl,
std::vector<SPIRVWord> LoopControlParameters, SPIRVBasicBlock *BB) {
return addInstruction(
new SPIRVLoopMerge(MergeBlock, ContinueTarget, LoopControl,
LoopControlParameters, BB),
BB, const_cast<SPIRVInstruction *>(BB->getTerminateInstr()));
SPIRVInstruction *TermInst = const_cast<SPIRVInstruction *>(BB->getTerminateInstr());
// OpLoopMerge must be the second-to-last instruction in the block,
// immediately preceding the branch instruction (OpBranch or OpBranchConditional)
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Suggested change
// immediately preceding the branch instruction (OpBranch or OpBranchConditional)
// immediately preceding the branch instruction (OpBranch or OpBranchConditional).

if (TermInst && (TermInst->getOpCode() == OpBranch ||
TermInst->getOpCode() == OpBranchConditional)) {
return addInstruction(
new SPIRVLoopMerge(MergeBlock, ContinueTarget, LoopControl,
LoopControlParameters, BB),
BB, TermInst);
} else {
// If there's no proper terminator, add at the end
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Suggested change
// If there's no proper terminator, add at the end
// If there's no proper terminator, add at the end.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Also, is this correct? You mentioned that the spec requires this instruction to immediately precede either an OpBranch or an OpBranchConditional. My understanding is that, if none of these exist, this instruction could not be placed. Maybe we should assert here instead?

return addInstruction(
new SPIRVLoopMerge(MergeBlock, ContinueTarget, LoopControl,
LoopControlParameters, BB),
BB);
}
Comment on lines +1867 to +1873
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Probably clang-tidy will recommend to remove else as previous if terminates with return.

}

SPIRVInstruction *SPIRVModuleImpl::addLoopControlINTELInst(
SPIRVWord LoopControl, std::vector<SPIRVWord> LoopControlParameters,
SPIRVBasicBlock *BB) {
addCapability(CapabilityUnstructuredLoopControlsINTEL);
addExtension(ExtensionID::SPV_INTEL_unstructured_loop_controls);
return addInstruction(
new SPIRVLoopControlINTEL(LoopControl, LoopControlParameters, BB), BB,
const_cast<SPIRVInstruction *>(BB->getTerminateInstr()));
SPIRVInstruction *TermInst = const_cast<SPIRVInstruction *>(BB->getTerminateInstr());
// OpLoopControlINTEL must be the second-to-last instruction in the block,
// immediately preceding the branch instruction (OpBranch or OpBranchConditional)
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Suggested change
// immediately preceding the branch instruction (OpBranch or OpBranchConditional)
// immediately preceding the branch instruction (OpBranch or OpBranchConditional).

if (TermInst && (TermInst->getOpCode() == OpBranch ||
TermInst->getOpCode() == OpBranchConditional)) {
return addInstruction(
new SPIRVLoopControlINTEL(LoopControl, LoopControlParameters, BB), BB,
TermInst);
} else {
// If there's no proper terminator, add at the end
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Suggested change
// If there's no proper terminator, add at the end
// If there's no proper terminator, add at the end.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Same than earlier. Is this compliant with the spec? Should we assert/report error instead?

return addInstruction(
new SPIRVLoopControlINTEL(LoopControl, LoopControlParameters, BB), BB);
}
}

SPIRVInstruction *SPIRVModuleImpl::addFixedPointIntelInst(
Expand Down
10 changes: 10 additions & 0 deletions test/OpLoopMerge_loopMerge.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,10 @@
; Test case for OpLoopMerge instruction placement validation.
; This test verifies that OpLoopMerge instructions are properly placed as the second-to-last
; instruction in their basic block, immediately preceding the branch instruction.

; RUN: llvm-spirv %S/loopMerge.bc -o %t.spv
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Please move .bc file content to the text and call llvm-as in the test before the translation.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

+1.

; RUN: spirv-val %t.spv

; RUN: llvm-spirv --to-text %t.spv -o - | FileCheck %s --check-prefix=CHECK-SPIRV-TEXT
; CHECK-SPIRV-TEXT: LoopMerge
; CHECK-SPIRV-TEXT-NEXT: BranchConditional
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Please, add newline at end of file.

Binary file added test/loopMerge.bc
Binary file not shown.
Loading