Add symbol generation of Lattice ECP5 FPGA family from CSV files

[joilm]

Lattice ECP FPGA family pin descriptions are used to auto-generate the schematic symbols.
This re-uses the Xilinx symbol generator from #293
Currently all ECP5U, ECP5UM and ECP5UM-5G are working, ECP3 devices have similar CSV files and should work as well.
The ICE FPGA series has different a pin descripion format.

Example

[Acathla-fr]

It works, but omits almost all the power pins (outside a bank)
EDIT: Okay, all VCC and GND pins are there, but merged in one VCC and one GND

[poeschlr]

is there a symbol pull request?

[nickoe]

@joilm ping