Corrected a few errors in the memory timings

[gabrielesvelto]

This fixes a few timing errors in the memory initialization routine, specifically the minimum self-refresh time which was too low for both Samsung and Hynix chip, as well as the four bank activation time and the exit-power-down-to-active-command delay for the Samsung ones. The changes are based on the memory chips' most recent datasheets as well as the JZ4780 manual and have fixed all memory-related freezes I've been experiencing with my board.

[grahamwhaley]

Congrats! That would be a not-quite-trivial fix, and excellent news for the platform.
Sadly, I no longer work on the board or have all the datasheets to hand to cross-check and ack.
Maybe some of the Debian folks can help out with the testing.

[gabrielesvelto]

Sadly, I no longer work on the board or have all the datasheets to hand to cross-check and ack.
Maybe some of the Debian folks can help out with the testing.

I obtained the programming manual and datasheets through a long Google session but I've put them all here for easy access.

[paulburton]

Hi Gabriel,

Apologies for the delay - unfortunately I haven't had much time to spend on the Ci20's aging U-Boot port for a while now, but this does indeed sound fantastically promising :)

Could you clarify which board revision(s) you tested this with?

Thanks,
Paul

[gabrielesvelto]

Hi Paul,
I've got a purple revision B board with Samsung K4B2G0846Q-BYK0. Unfortunately while this change has made my board much more stable than before it hasn't fixed the problems entirely. I can run compilations for hours, even days but I still experienced freezes after prolonged periods of inactivity. I suspect that the tMINSR value isn't quit right yet. Since I'm no expert in memory timings I couldn't find what values it corresponds to in the memory chips datasheets.