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lines changed Original file line number Diff line number Diff line change 4848 reg [7 :0 ] clk_counter;
4949 reg [7 :0 ] impulse_counter;
5050 reg [7 :0 ] total_impulse_counter;
51- reg impulse_rejected;
52- // reg[7:0] selected_impulse_counter;
5351 reg [2 :0 ] state;
54- reg impulse_selected ;
52+ reg impulse_rejected ;
5553 reg period_done;
5654
5755 always @(posedge aclk)
6159 clk_counter <= 0 ;
6260 impulse_counter <= 0 ;
6361 total_impulse_counter <= 0 ;
64- // impulse_selected <= 0;
6562 state <= INITIAL_STATE;
6663 lower_threshold <= 0 ;
6764 upper_threshold <= 0 ;
9087 if (impulse_counter <= IMPULSES_FOR_SELECTION)
9188 state <= LOWER_THRESHOLD_LOW_PHASE;
9289 else state <= UPPER_THRESHOLD_HIGH_PHASE;;
93- end
94- // clk_counter <= 0;
95- /*if(impulse_counter <= IMPULSES_FOR_SELECTION)
96- begin
97- state <= LOWER_THRESHOLD_LOW_PHASE;
98- // impulse_selected <= 1;
99- impulse_counter <= impulse_counter + 1;
100- end
101- else
102- begin
103- state <= FINAL_STATE; //UPPER_THRESHOLD_HIGH_PHASE;
104- end*/
90+ end
10591 end
10692 UPPER_THRESHOLD_HIGH_PHASE:
10793 begin
130116 end
131117 FINAL_STATE:
132118 begin
133- // state <= INITIAL_STATE;
134- // impulse_selected <= 0;
135119 impulse_counter <= 0 ;
136120 total_impulse_counter <= 0 ;
137121 period_done <= 1 ;
138- // impulse_selected <= 0;
139122 end
140123 default :
141124 begin
142125 end
143126 endcase
144127 end
145128 else
146- begin
147- // impulse_selected <= 0;
148- // total_impulse_counter <= 0;
149- // impulse_selected <= 0;
150129 state <= INITIAL_STATE;
151- end
152130 end
153131 end
154132
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