[https://nvbugs/5791900][fix] Fix HelixCpMnnvlMemory init with PP #10533
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📝 WalkthroughWalkthroughRefactors Helix CP communicator creation by simplifying rank grouping from a composite to direct PP/TP combination, introduces conditional pre-initialization logic via a new helper function integrated into PP communicator setup, and adjusts test configuration entries. Changes
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🧠 Learnings (7)📚 Learning: 2025-08-26T09:49:04.956ZApplied to files:
📚 Learning: 2025-09-17T02:48:52.732ZApplied to files:
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📚 Learning: 2025-07-28T17:06:08.621ZApplied to files:
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📚 Learning: 2025-09-02T13:42:44.885ZApplied to files:
🧬 Code graph analysis (2)tensorrt_llm/_mnnvl_utils.py (3)
tensorrt_llm/_torch/distributed/communicator.py (1)
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tensorrt_llm/_mnnvl_utils.py (1)
1-1: Update the copyright year.The copyright year shows "2022-2024" but should be updated to include 2025 or 2026 to reflect the latest meaningful modification.
As per coding guidelines, all TensorRT-LLM source files should contain an NVIDIA copyright header with the year of latest meaningful modification.
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tensorrt_llm/_mnnvl_utils.pytensorrt_llm/_torch/distributed/communicator.pytests/integration/test_lists/test-db/l0_dgx_b200.yml
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All TensorRT-LLM source files (.cpp, .h, .cu, .py, and other source files) should contain an NVIDIA copyright header with the year of latest meaningful modification
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tensorrt_llm/_mnnvl_utils.pytensorrt_llm/_torch/distributed/communicator.py
🧠 Learnings (7)
📚 Learning: 2025-08-26T09:49:04.956Z
Learnt from: pengbowang-nv
Repo: NVIDIA/TensorRT-LLM PR: 7192
File: tests/integration/test_lists/test-db/l0_dgx_b200.yml:56-72
Timestamp: 2025-08-26T09:49:04.956Z
Learning: In TensorRT-LLM test configuration files, the test scheduling system handles wildcard matching with special rules that prevent duplicate test execution even when the same tests appear in multiple yaml files with overlapping GPU wildcards (e.g., "*b200*" and "*gb200*").
Applied to files:
tests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-09-17T02:48:52.732Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 7781
File: tests/integration/test_lists/waives.txt:313-313
Timestamp: 2025-09-17T02:48:52.732Z
Learning: In TensorRT-LLM, `tests/integration/test_lists/waives.txt` is specifically for waiving/skipping tests, while other test list files like those in `test-db/` and `qa/` directories are for different test execution contexts (pre-merge, post-merge, QA tests). The same test appearing in both waives.txt and execution list files is intentional - the test is part of test suites but will be skipped due to the waiver.
Applied to files:
tests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-09-17T06:01:01.836Z
Learnt from: fredricz-20070104
Repo: NVIDIA/TensorRT-LLM PR: 7785
File: tests/integration/defs/perf/utils.py:321-333
Timestamp: 2025-09-17T06:01:01.836Z
Learning: In test infrastructure code for disaggregated serving tests, prefer logging errors and continuing execution rather than raising exceptions on timeout, to avoid disrupting test cleanup and causing cascading failures.
Applied to files:
tests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-07-28T17:06:08.621Z
Learnt from: moraxu
Repo: NVIDIA/TensorRT-LLM PR: 6303
File: tests/integration/test_lists/qa/examples_test_list.txt:494-494
Timestamp: 2025-07-28T17:06:08.621Z
Learning: In TensorRT-LLM testing, it's common to have both CLI flow tests (test_cli_flow.py) and PyTorch API tests (test_llm_api_pytorch.py) for the same model. These serve different purposes: CLI flow tests validate the traditional command-line workflow, while PyTorch API tests validate the newer LLM API backend. Both are legitimate and should coexist.
Applied to files:
tests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-08-13T11:07:11.772Z
Learnt from: Funatiq
Repo: NVIDIA/TensorRT-LLM PR: 6754
File: tests/integration/test_lists/test-db/l0_a30.yml:41-47
Timestamp: 2025-08-13T11:07:11.772Z
Learning: In TensorRT-LLM test configuration files like tests/integration/test_lists/test-db/l0_a30.yml, TIMEOUT values are specified in minutes, not seconds.
Applied to files:
tests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-08-14T06:36:40.701Z
Learnt from: timlee0212
Repo: NVIDIA/TensorRT-LLM PR: 6886
File: tensorrt_llm/_torch/models/modeling_deepseekv3.py:0-0
Timestamp: 2025-08-14T06:36:40.701Z
Learning: In DeepSeek V3 model (tensorrt_llm/_torch/models/modeling_deepseekv3.py), the disagreement between AllReduce.__init__ guard and _compute_mlp_tp_size logic for MNNVL usage is expected by design. The AllReduce component and MLP TP-size computation intentionally use different criteria for MNNVL availability decisions.
Applied to files:
tensorrt_llm/_mnnvl_utils.pytensorrt_llm/_torch/distributed/communicator.py
📚 Learning: 2025-09-02T13:42:44.885Z
Learnt from: pcastonguay
Repo: NVIDIA/TensorRT-LLM PR: 7455
File: tensorrt_llm/_torch/pyexecutor/py_executor.py:1852-1860
Timestamp: 2025-09-02T13:42:44.885Z
Learning: In MPI communication within TensorRT-LLM pipeline parallelism, different communication types (tokens, logits, termination sync) must use disjoint tag namespaces to avoid message routing collisions when using the same source/destination patterns.
Applied to files:
tensorrt_llm/_torch/distributed/communicator.py
🧬 Code graph analysis (2)
tensorrt_llm/_mnnvl_utils.py (3)
tensorrt_llm/_torch/distributed/communicator.py (6)
pp_rank(77-78)tp_size(65-66)tp_rank(73-74)cp_rank(69-70)has_cp_helix(105-106)cp_config(109-110)tensorrt_llm/mapping.py (1)
Mapping(361-540)tensorrt_llm/_torch/distributed/ops.py (1)
get(388-421)
tensorrt_llm/_torch/distributed/communicator.py (1)
tensorrt_llm/_mnnvl_utils.py (1)
init_helix_cp_comm(380-396)
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🔇 Additional comments (6)
tensorrt_llm/_torch/distributed/communicator.py (2)
19-19: LGTM!The import follows the coding guidelines by maintaining the namespace.
885-893: Correct placement of Helix CP communicator pre-initialization.Calling
init_helix_cp_comm(mapping)immediately after PPComm initialization ensures all ranks participate in the MPI Split operation before any PP-induced divergence. This is the key fix for the deadlock issue described in the PR objectives.tests/integration/test_lists/test-db/l0_dgx_b200.yml (2)
74-74: LGTM - Strategic test configuration for pre-merge validation.The change to
fifo-cudagraph:with_padding-pp2tp1cp2in pre_merge is appropriate. FIFO uses MNNVL communication (whereuse_nccl_for_alltoall=False), which exercises the new pre-initialization code path that fixes the PP+MNNVL deadlock described in the PR objectives.
104-104: LGTM - Complementary test coverage in post-merge.The swap to
nccl-cudagraph:with_padding-pp2tp1cp2in post_merge provides complementary coverage of the NCCL communication path (whereuse_nccl_for_alltoall=Trueand pre-initialization is skipped).tensorrt_llm/_mnnvl_utils.py (2)
380-397: Excellent fix for the PP+MNNVL deadlock.The pre-initialization approach correctly addresses the root cause: ensuring all ranks participate in the collective MPI Split operation before PP pipeline divergence occurs. The comprehensive docstring clearly explains the problem and solution. The default value for
use_nccl_for_alltoallis consistentlyTrueacross the codebase, and the pre-initialization triggers only when explicitly set toFalse, as intended.
367-377: Update docstring to accurately describe attention-only Helix CP communicator.The Split key simplification is correct: Helix CP is used only for attention layers where MOE is not involved. FFN layers (where MOE happens) repurpose CP ranks to TP. However, the docstring incorrectly mentions MOE_TP grouping. Update line 369 to:
"""Get CP-based communicator (ranks grouped by PP+TP, ordered by CP rank)."""Likely an incorrect or invalid review comment.
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@yuxianq is an expert for pp and mnnvl. Add him as a reviewer. |
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Signed-off-by: Balaram Buddharaju <[email protected]>
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…IDIA#10533) Signed-off-by: Balaram Buddharaju <[email protected]> Signed-off-by: Daniil Kulko <[email protected]>
4 participants
Description
Issue: Helix integration test with combination of PP+MNNVL comms usage of AllToAll hangs.
Root cause: HelixCpMnnvlMemory has lazy initialization with
mpi_comm().split()and needs all ranks to participate. This is not happening with Pipeline Parallelism as those ranks with varyingppRankdon't reach thempi_comm().split()at the same time.Fix: Eager initialization when PP is involved.
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