Add Pinmux Register Address Lookup Tool#130
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anhmiuhv merged 19 commits intoNVIDIA:masterfrom Sep 26, 2025
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anhmiuhv
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Sep 18, 2025
| @@ -0,0 +1,79 @@ | |||
| # Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. | |||
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can you add #!/usr/bin/env python
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I think we should rename this file to gpio_pinmux_lookup.py
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Can you add documentation on how to use this in the README
anhmiuhv
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Sep 18, 2025
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can you remove _ between pin and mux
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This reverts commit 52d6867.
…ded Board BOARD mode GPIO pin number + corresponding test file Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
…d formatting Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
…environment variable JETSON_TESTING_MODEL_NAME overrides device models entirely, pinmux as one word, addressing comments Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
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…IN_NX_PIN_DEFS with correct pinmux registers. Extracts data from tegra234_groups and tegra234_aon_groups in pinctrl file. Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
anhmiuhv
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Sep 23, 2025
| x[2], | ||
| pwm_chip_dir=pwm_dirs.get(x[7], None), | ||
| pwm_id=x[8], | ||
| reg_block_base_addr=x[9] if 9 < len(x) else None, |
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can you update this for the new data structure?
lib/python/Jetson/GPIO/gpio_cdev.py
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| try: | ||
| mem_fd = os.open('/dev/mem', os.O_RDONLY | os.O_SYNC) | ||
| reg_address = ch_info.reg_block_base_addr + ch_info.reg_offset |
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Because the data structure change i think this need to change also
…sting logic for changed data structure Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
anhmiuhv
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Sep 23, 2025
dev/update_pinmux_registers.py
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| @@ -1,5 +1,5 @@ | |||
| #!/usr/bin/env python | |||
| # Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved. | |||
| # Copyright (c) 2019-2025, NVIDIA CORPORATION. All rights reserved. | |||
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I think this is a new file so it would be
2025
lib/python/Jetson/GPIO/gpio_cdev.py
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| @@ -1,4 +1,4 @@ | |||
| # Copyright (c) 2023, NVIDIA CORPORATION. All rights reserved. | |||
| # Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. | |||
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this is an old file so it should be
2023-2025
dev/pinctrl-tegra234.c
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| * Pinctrl data for the NVIDIA Tegra234 pinmux | ||
| * | ||
| * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved. | ||
| * Copyright (c) 2021-2025, NVIDIA CORPORATION. All rights reserved. |
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Technically you dont need to change this 😅
Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
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Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
anhmiuhv
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Sep 25, 2025
samples/test_all_apis.py
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| GPIO.setwarnings(True) | ||
| mem_fd = os.open('/dev/mem', os.O_RDWR | os.O_SYNC) | ||
| # These depend on the pin being BCM 4 for Orin nano/nx | ||
| PIN_REGISTER_ADDR = 0x02448000 + 0x28 |
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can you update the PIN_REGISTER_ADDR to 0x02448030
Co-authored-by: Tharun Ganeshram <tharun.ganeshram@gmail.com>
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Simple tool to lookup pin mux register address for Jetson GPIO pins. User must specify the BOARD mode GPIO pin number.