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shuzhuo
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doc: add changelog for f16/f32 rvv math opt
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NMSIS/doc/source/changelog.rst

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@@ -34,6 +34,7 @@ This is the version of ``V1.4.2`` release, still in development.
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- Fix ``riscv_cfft_radix4_q31.c`` producing incorrect results
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- Fix ``riscv_power_q31`` output scaling, which should be in Q2.48 format
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- Fix ``riscv_cfft_q15`` using the wrong variable
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- Add ``riscv_vec_math.h`` and ``riscv_vec_math_f16.h`` providing f16/f32 RVV-accelerated math functions (exp, log, sin, cos, pow, tanh, etc.)
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* **Build System**
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