GOTCHAS

PAC register write

Register write, that do not write all of the bitfields of the register, sets other bitfields according to the register reset value from the SVD file instead of 000s like C.

For example, p.clkctl0.adc0fclkdiv().write(|w| unsafe { w.div().bits(0x0) }); writes 0 to div bitfield (7:0) but reset halt bitfield (30) to 1. Because the SVD definition for this register provides the reset value of 0x4000_0000.

<register>
  <name>ADC0FCLKDIV</name>
  <description>ADC0 fclk divider</description>
  <addressOffset>0x6D8</addressOffset>
  <size>32</size>
  <access>read-write</access>
  <resetValue>0x40000000</resetValue>
  <resetMask>0xE00000FF</resetMask>

To get the correct behavior, one should have called modify() or write all the bitfields instead. So take this into account when you are calling write() but not writing all the bitfields.