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Clarify test assertion for UnitarySynthesis #15489

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Merged
mtreinish merged 1 commit into from
Jan 21, 2026
Merged

Clarify test assertion for UnitarySynthesis #15489

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25 changes: 13 additions & 12 deletions test/python/transpiler/test_unitary_synthesis.py
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Original file line number Diff line number Diff line change
Expand Up @@ -357,12 +357,12 @@ def construct_passmanager(basis_gates, coupling_map, synthesis_fidelity, pulse_o

qv64_1 = pm1.run(qv64.decompose())
qv64_2 = pm2.run(qv64.decompose())
edges = [list(edge) for edge in coupling_map.get_edges()]
self.assertTrue(
all(
[qv64_1.qubits.index(qubit) for qubit in instr.qubits] in edges
self.assertLessEqual(
{
tuple(qv64_1.qubits.index(qubit) for qubit in instr.qubits)
for instr in qv64_1.get_instructions("cx")
)
},
{tuple(edge) for edge in coupling_map.get_edges()},
)
self.assertEqual(Operator(qv64_1), Operator(qv64_2))

Expand Down Expand Up @@ -1039,24 +1039,25 @@ def test_two_qubit_synthesis_to_directional_cx_multiple_registers_target(
def test_two_qubit_natural_direction_true_duration_fallback_target(self):
"""Verify fallback path when pulse_optimize==True."""
basis_gates = ["id", "rz", "sx", "x", "cx", "reset"]
qr = QuantumRegister(2)
qr = QuantumRegister(5)
coupling_map = CouplingMap([[0, 1], [1, 0], [1, 2], [1, 3], [3, 4]])
backend = GenericBackendV2(
num_qubits=5, basis_gates=basis_gates, coupling_map=coupling_map, seed=1
)

triv_layout_pass = TrivialLayout(coupling_map)
qc = QuantumCircuit(qr)
qc.unitary(random_unitary(4, seed=12), [0, 1])
unisynth_pass = UnitarySynthesis(
target=backend.target,
pulse_optimize=True,
natural_direction=True,
)
pm = PassManager([triv_layout_pass, unisynth_pass])
qc_out = pm.run(qc)
self.assertTrue(
all(((qr[0], qr[1]) == instr.qubits for instr in qc_out.get_instructions("cx")))
qc_out = unisynth_pass(qc)
self.assertEqual(
{
tuple(qc_out.find_bit(q).index for q in instr.qubits)
for instr in qc_out.get_instructions("cx")
},
{(0, 1)},
)


Expand Down