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2 changes: 1 addition & 1 deletion src/bloqade/analysis/address/lattice.py
Original file line number Diff line number Diff line change
Expand Up @@ -81,5 +81,5 @@ class AddressWire(Address):

def is_subseteq(self, other: Address) -> bool:
if isinstance(other, AddressWire):
return self.origin_qubit == self.origin_qubit
return self.origin_qubit == other.origin_qubit
return False
17 changes: 17 additions & 0 deletions test/analysis/address/test_lattice.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,17 @@
from bloqade.analysis.address import AddressReg, AddressWire, AddressQubit


def test_address_wire_is_subset_eq():

origin_qubit_0 = AddressQubit(data=0)
address_wire_0 = AddressWire(origin_qubit=origin_qubit_0)

origin_qubit_1 = AddressQubit(data=1)
address_wire_1 = AddressWire(origin_qubit=origin_qubit_1)

assert address_wire_0.is_subseteq(address_wire_0)
assert not address_wire_0.is_subseteq(address_wire_1)

# fully exercise logic with lattice type that is not address wire
address_reg = AddressReg(data=[0, 1, 2, 3])
assert not address_wire_0.is_subseteq(address_reg)