cpu: rename doc.txt -> doc.md for remaining CPUs

Author: krzysztof-cabaj

cpu/cc2538/doc.md

@@ -0,0 +1,7 @@
+@defgroup       cpu_cc2538 TI CC2538
+@ingroup        cpu
+@brief          Texas Instruments CC2538 Cortex-M3 MCU specific code
+
+@defgroup       cpu_cc2538_regs TI CC2538 CMSIS-style Headers
+@ingroup        cpu_cc2538
+@brief          CMSIS-style register definitions for the TI CC2538

cpu/cc2538/doc.txt

@@ -0,0 +1,11 @@
+@defgroup       cpu_cc26x0_cc13x0 TI CC26x0/CC13x0
+@ingroup        cpu
+@brief          Texas Instruments CC26x0/CC13x0 Cortex-M3 MCU specific code
+
+@defgroup       cpu_specific_peripheral_memory_map TI CC26x0/CC13x0 peripheral memory map
+@ingroup        cpu
+@brief          Texas Instruments CC26x0/CC13x0 memory mappings for peripherals
+
+@defgroup       cpu_cc26x0_cc13x0_definitions TI CC26x0/CC13x0 definitions
+@ingroup        cpu_cc26x0_cc13x0
+@brief          Texas Instruments CC26x0 specific defines

cpu/cc26x0_cc13x0/doc.md

@@ -0,0 +1,11 @@
+@defgroup       cpu_cc26x2_cc13x2 TI CC26x2, CC13x2
+@ingroup        cpu
+@brief          Texas Instruments CC26x2, CC13x2 Cortex-M4F MCU specific code
+
+@defgroup       cpu_cc26x2_cc13x2_peripheral_memory_map TI CC26x2, CC13x2 peripheral memory map
+@ingroup        cpu
+@brief          Texas Instruments CC26x2, CC13x2 memory mappings for peripherals
+
+@defgroup       cpu_cc26x2_cc13x2_definitions TI CC26x2, CC13x2 definitions
+@ingroup        cpu_cc26x2_cc13x2
+@brief          Texas Instruments CC26x2, CC13x2 specific defines

cpu/cc26x0_cc13x0/doc.txt

@@ -1,7 +1,6 @@
-/**
-@defgroup        cpu_cc26xx_cc13xx CC26xx/CC13xx common
-@ingroup         cpu
-@brief           Common code for TI cc26xx/cc13xx family
+@defgroup       cpu_cc26xx_cc13xx CC26xx/CC13xx common
+@ingroup        cpu
+@brief          Common code for TI cc26xx/cc13xx family
 
 This module contains code common to all cc26xx/cc13xx cpus
 supported by RIOT: @ref cpu_cc26x0_cc13x0, @ref cpu_cc26x2_cc13x2
@@ -171,14 +170,9 @@ programmer, if it's not the case for an external board, you can always use
 uniflash by setting this environment variable `PROGRAMMER=uniflash` to change
 the default programmer.
 
-*/
-
-/**
- * @defgroup        cpu_cc26xx_cc13xx_definitions CC26xx/CC13xx common
- * @ingroup         cpu
- * @brief           Common definitions for TI cc26xx/cc13xx family
- *
- * This module contains definitions common to all cc26xx/cc13xx cpus
- * supported by RIOT: @ref cpu_cc26x0_cc13x0, @ref cpu_cc26x2_cc13x2
- *
- */
+@defgroup       cpu_cc26xx_cc13xx_definitions CC26xx/CC13xx common
+@ingroup        cpu
+@brief          Common definitions for TI cc26xx/cc13xx family
+
+This module contains definitions common to all cc26xx/cc13xx cpus
+supported by RIOT: @ref cpu_cc26x0_cc13x0, @ref cpu_cc26x2_cc13x2

cpu/cc26x2_cc13x2/doc.md

@@ -0,0 +1,40 @@
+<!--
+Copyright (C) 2013 Freie Universität Berlin
+
+This file is subject to the terms and conditions of the GNU Lesser
+General Public License v2.1. See the file LICENSE in the top level
+directory for more details.
+-->
+
+@defgroup   cpu CPU
+@brief      CPU specific implementations
+
+This module contains all CPU specific source files. In case of multiple CPUs
+sharing the same architecture, the implementation is split into several CPU
+specific parts and an architecture part (e.g. arm7_common and lpc23xx).
+
+@defgroup   config_cpu CPU Configurations
+@ingroup    config
+@brief      Compile time configurations for different kinds of CPU.
+
+@brief  Skip calling `board_init()`
+
+Don't call `board_init()`, leave all pins in their default state.
+
+This is intended to be used with basic riotboot_slot which does not interact
+with any external hardware.
+
+@experimental    Only use this if you know what you are doing
+
+    #define DISABLE_BOARD_INIT  0
+
+@brief  Skip calling `cpu_init()`
+
+Don't call `cpu_init()`, leave all CPU configuration in boot-up state.
+
+This is intended to be used with basic riotboot_slot which does not interact
+with any CPU peripherals.
+
+@experimental   Only use this if you know what you are doing
+
+    #define DISABLE_CPU_INIT    0

cpu/cc26x2_cc13x2/doc.txt

@@ -0,0 +1,104 @@
+@defgroup       cpu_efm32 Silicon Labs EFM32/EFR32/EZR32
+@ingroup        cpu
+@brief          Silicon Labs's EFM32/EFR32/EZR32 MCUs implementation
+
+This module contains all code and definitions for the Silicon Labs
+EFM32/EFR32/EZR32 MCUs. It uses the Gecko SDK (vendor library) for the
+peripheral drivers.
+
+Supported Peripherals
+=====================
+
+The following peripherals are supported (depends on microcontroller):
+  - ADC
+  - CPUID
+  - DAC
+  - Flash page
+  - GPIO
+  - HW RNG
+  - I2C
+  - Power Management
+  - PWM
+  - RTC
+  - RTT
+  - SPI
+  - Timer
+  - UART (including low-power)
+
+Clock Configuration
+===================
+
+By default the microcontroller will run on the internal RC-oscillator. If
+an external crystal is available, you can configure it to use by setting
+`CLOCK_HF=cmuSelect_HFXO`. The same applies for `CLOCK_LFA`, `CLOCK_LFB` and
+`CLOCK_LFE` using `cmuSelect_LFXO`.
+
+If the internal RC-oscillator is not used, it will be disabled.
+
+Refer to the reference manual of the specific microcontroller for the
+specifics.
+
+EMU and CMU Configuration
+=========================
+
+The Energy Management Unit (EMU) and Clock Management Unit (CMU) are
+initialized using default values provided by the Gecko SDK. You can override
+any of the following defaults to use other values:
+
+  - `CMU_HFXOINIT`
+  - `CMU_LFXOINIT`
+  - `EMU_DCDCINIT`
+  - `EMU_EM23INIT`
+  - `EMU_EM4INIT`
+
+Refer to the Gecko SDK for more information about these values.
+
+Low-power Configuration
+=======================
+
+The EFM32/EFR32/EZR32 MCUs have support for low-power peripherals. Support
+is enabled by default, but can be disabled if not used.
+
+- Setting `EFM32_LEUART_ENABLED=0` will disable support for the LEUART
+  in the UART driver peripheral and save approximately 400 bytes.
+  Refer to `cpu/efm32/efm32-features.mk` for more options.
+
+@defgroup       cpu_efm32gg Silicon Labs EFM32GG family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFM32GG MCUs family implementation
+
+@defgroup       cpu_efm32hg Silicon Labs EFM32HG family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFM32HG MCUs family implementation
+
+@defgroup       cpu_efm32lg Silicon Labs EFM32LG family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFM32LG MCUs family implementation
+
+@defgroup       cpu_efm32pg1b Silicon Labs EFM32PG1B family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFM32PG1B MCUs family implementation
+
+@defgroup       cpu_efm32pg12b Silicon Labs EFM32PG12B family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFM32PG12B MCUs family implementation
+
+@defgroup       cpu_efm32zg Silicon Labs EFM32ZG family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFM32ZG MCUs family implementation
+
+@defgroup       cpu_efr32mg1b Silicon Labs EFR32MG1P family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFR32MG1B MCUs family implementation
+
+@defgroup       cpu_efr32mg1p Silicon Labs EFR32MG1P family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFR32MG1P MCUs family implementation
+
+@defgroup       cpu_efr32mg12p Silicon Labs EFR32MG12P family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EFR32MG12P MCUs family implementation
+
+@defgroup       cpu_ezr32wg Silicon Labs EZR32WG family
+@ingroup        cpu_efm32
+@brief          Silicon Labs's EZR32WG MCUs family implementation