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Merge pull request #4 from ROBOTIS-GIT/hotfix-indirect-check
Extend Bulk/Sync Selection Logic to Include Indirect Operations
2 parents 945fc5c + 767b187 commit be0bc02

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2 files changed

+59
-18
lines changed

2 files changed

+59
-18
lines changed

src/dynamixel/dynamixel.cpp

Lines changed: 58 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -658,6 +658,22 @@ DxlError Dynamixel::WriteMultiDxlData()
658658
bool Dynamixel::checkReadType()
659659
{
660660
for (size_t dxl_index = 1; dxl_index < read_data_list_.size(); dxl_index++) {
661+
// Check if Indirect Data Read address and size are different
662+
uint16_t indirect_addr[2]; // [i-1], [i]
663+
uint8_t indirect_size[2]; // [i-1], [i]
664+
665+
if (!dxl_info_.GetDxlControlItem(
666+
read_data_list_.at(dxl_index).id, "Indirect Data Read", indirect_addr[1], indirect_size[1]) ||
667+
!dxl_info_.GetDxlControlItem(
668+
read_data_list_.at(dxl_index - 1).id, "Indirect Data Read", indirect_addr[0], indirect_size[0]))
669+
{
670+
return BULK;
671+
}
672+
673+
if (indirect_addr[1] != indirect_addr[0] || indirect_size[1] != indirect_size[0]) {
674+
return BULK;
675+
}
676+
661677
if (read_data_list_.at(dxl_index).item_name.size() !=
662678
read_data_list_.at(dxl_index - 1).item_name.size())
663679
{
@@ -667,7 +683,11 @@ bool Dynamixel::checkReadType()
667683
item_index++)
668684
{
669685
if (read_data_list_.at(dxl_index).item_name.at(item_index) !=
670-
read_data_list_.at(dxl_index - 1).item_name.at(item_index))
686+
read_data_list_.at(dxl_index - 1).item_name.at(item_index) ||
687+
read_data_list_.at(dxl_index).item_addr.at(item_index) !=
688+
read_data_list_.at(dxl_index - 1).item_addr.at(item_index) ||
689+
read_data_list_.at(dxl_index).item_size.at(item_index) !=
690+
read_data_list_.at(dxl_index - 1).item_size.at(item_index))
671691
{
672692
return BULK;
673693
}
@@ -679,6 +699,22 @@ bool Dynamixel::checkReadType()
679699
bool Dynamixel::checkWriteType()
680700
{
681701
for (size_t dxl_index = 1; dxl_index < write_data_list_.size(); dxl_index++) {
702+
// Check if Indirect Data Write address and size are different
703+
uint16_t indirect_addr[2]; // [i-1], [i]
704+
uint8_t indirect_size[2]; // [i-1], [i]
705+
706+
if (!dxl_info_.GetDxlControlItem(
707+
write_data_list_.at(dxl_index).id, "Indirect Data Write", indirect_addr[1], indirect_size[1]) ||
708+
!dxl_info_.GetDxlControlItem(
709+
write_data_list_.at(dxl_index - 1).id, "Indirect Data Write", indirect_addr[0], indirect_size[0]))
710+
{
711+
return BULK;
712+
}
713+
714+
if (indirect_addr[1] != indirect_addr[0] || indirect_size[1] != indirect_size[0]) {
715+
return BULK;
716+
}
717+
682718
if (write_data_list_.at(dxl_index).item_name.size() !=
683719
write_data_list_.at(dxl_index - 1).item_name.size())
684720
{
@@ -688,7 +724,12 @@ bool Dynamixel::checkWriteType()
688724
item_index++)
689725
{
690726
if (write_data_list_.at(dxl_index).item_name.at(item_index) !=
691-
write_data_list_.at(dxl_index - 1).item_name.at(item_index))
727+
write_data_list_.at(dxl_index - 1).item_name.at(item_index) ||
728+
write_data_list_.at(dxl_index).item_addr.at(item_index) !=
729+
write_data_list_.at(dxl_index - 1).item_addr.at(item_index) ||
730+
write_data_list_.at(dxl_index).item_size.at(item_index) !=
731+
write_data_list_.at(dxl_index - 1).item_size.at(item_index)
732+
)
692733
{
693734
return BULK;
694735
}
@@ -870,11 +911,12 @@ DxlError Dynamixel::SetBulkReadHandler(std::vector<uint8_t> id_arr)
870911
}
871912
// Set indirect addr.
872913
indirect_info_read_[it_id].indirect_data_addr = IN_ADDR;
914+
915+
fprintf(
916+
stderr,
917+
"set bulk read (indirect addr) : addr %d, size %d\n",
918+
IN_ADDR, indirect_info_read_[id_arr.at(0)].size);
873919
}
874-
fprintf(
875-
stderr,
876-
"set bulk read (indirect addr) : addr %d, size %d\n",
877-
IN_ADDR, indirect_info_read_[id_arr.at(0)].size);
878920

879921
group_bulk_read_ = new dynamixel::GroupBulkRead(port_handler_, packet_handler_);
880922

@@ -1130,30 +1172,29 @@ DxlError Dynamixel::SetBulkWriteItemAndHandler()
11301172

11311173
DxlError Dynamixel::SetBulkWriteHandler(std::vector<uint8_t> id_arr)
11321174
{
1133-
uint16_t INDIRECT_ADDR = 0;
1134-
uint8_t INDIRECT_SIZE;
1175+
uint16_t IN_ADDR = 0;
1176+
uint8_t IN_SIZE = 0;
11351177

11361178
for (auto it_id : id_arr) {
11371179
// Get the indirect addr.
1138-
if (dxl_info_.GetDxlControlItem(
1139-
it_id, "Indirect Data Write", INDIRECT_ADDR,
1140-
INDIRECT_SIZE) == false)
1141-
{
1180+
if (dxl_info_.GetDxlControlItem(it_id, "Indirect Data Write", IN_ADDR, IN_SIZE) == false) {
11421181
fprintf(
11431182
stderr,
11441183
"Fail to set indirect address bulk write. "
11451184
"the dxl unincluding indirect address in control table are being used.\n");
11461185
return DxlError::SET_BULK_WRITE_FAIL;
11471186
}
11481187
// Set indirect addr.
1149-
indirect_info_write_[it_id].indirect_data_addr = INDIRECT_ADDR;
1188+
indirect_info_write_[it_id].indirect_data_addr = IN_ADDR;
1189+
1190+
fprintf(
1191+
stderr,
1192+
"set bulk write (indirect addr) : addr %d, size %d\n",
1193+
IN_ADDR, indirect_info_write_[id_arr.at(0)].size);
11501194
}
1151-
fprintf(
1152-
stderr,
1153-
"set bulk write (indirect addr) : addr %d, size %d\n",
1154-
INDIRECT_ADDR, indirect_info_write_[id_arr.at(0)].size);
11551195

11561196
group_bulk_write_ = new dynamixel::GroupBulkWrite(port_handler_, packet_handler_);
1197+
11571198
return DxlError::OK;
11581199
}
11591200

src/dynamixel_hardware_interface.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ hardware_interface::CallbackReturn DynamixelHardware::on_init(
9393
} else if (gpio.parameters.at("type") == "sensor") {
9494
sensor_id_.push_back(static_cast<uint8_t>(stoi(gpio.parameters.at("ID"))));
9595
} else {
96-
RCLCPP_ERROR_STREAM(logger_, "Invalid DXL / Sensoe type");
96+
RCLCPP_ERROR_STREAM(logger_, "Invalid DXL / Sensor type");
9797
exit(-1);
9898
}
9999
}

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