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| 1 | +/* |
| 2 | + * Copyright (c) 2006-2024 RT-Thread Development Team |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + * |
| 6 | + * Change Logs: |
| 7 | + * Date Author Notes |
| 8 | + * 2024-11-25 hywing The first version for NXP MCXA153 Board |
| 9 | + */ |
| 10 | + |
| 11 | +#include <rtthread.h> |
| 12 | +#include "drv_wdt.h" |
| 13 | + |
| 14 | +#include "fsl_wdog32.h" |
| 15 | +#include "fsl_clock.h" |
| 16 | + |
| 17 | +#ifdef RT_USING_WDT |
| 18 | + |
| 19 | +#define WDT WDOG |
| 20 | +#define WDT_CLOCK_SOURCE kWDOG32_ClockSource1 /* 0: Bus, 1: LPO, 2: SOSC, 3: SIRC */ |
| 21 | +#define WDT_CLOCK_SOURCE_FREQ (128 * 1000 / 256) /* 128kHz LPO divided by 256 */ |
| 22 | + |
| 23 | +#define APP_WDT_IRQn WDOG_EWM_IRQn |
| 24 | +#define APP_WDT_IRQ_HANDLER WDOG_EWM_IRQHandler |
| 25 | + |
| 26 | +struct mcx_wdt |
| 27 | +{ |
| 28 | + rt_watchdog_t watchdog; |
| 29 | + WDOG_Type *wdt_base; |
| 30 | +}; |
| 31 | + |
| 32 | +static struct mcx_wdt wdt_dev; |
| 33 | + |
| 34 | +void APP_WDT_IRQ_HANDLER(void) |
| 35 | +{ |
| 36 | + /* ---- There's no WARN feature for WDOG32, will reset. ---- */ |
| 37 | + for (;;) |
| 38 | + { |
| 39 | + } |
| 40 | +} |
| 41 | + |
| 42 | +static rt_err_t wdt_init(rt_watchdog_t *wdt) |
| 43 | +{ |
| 44 | + wdog32_config_t config; |
| 45 | + |
| 46 | + WDOG32_GetDefaultConfig(&config); |
| 47 | + |
| 48 | + config.enableWdog32 = false; |
| 49 | + config.clockSource = WDT_CLOCK_SOURCE; |
| 50 | + config.prescaler = kWDOG32_ClockPrescalerDivide256; |
| 51 | + config.timeoutValue = WDT_CLOCK_SOURCE_FREQ * 5; |
| 52 | + config.enableInterrupt = true; |
| 53 | + |
| 54 | + WDOG32_Init(WDT, &config); |
| 55 | + NVIC_EnableIRQ(APP_WDT_IRQn); |
| 56 | + |
| 57 | + return RT_EOK; |
| 58 | +} |
| 59 | + |
| 60 | +static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg) |
| 61 | +{ |
| 62 | + /* Feed fast path */ |
| 63 | + if (cmd == RT_DEVICE_CTRL_WDT_KEEPALIVE) |
| 64 | + { |
| 65 | + WDOG32_Refresh(wdt_dev.wdt_base); |
| 66 | + return RT_EOK; |
| 67 | + } |
| 68 | + |
| 69 | + __disable_irq(); |
| 70 | + WDOG32_Unlock(wdt_dev.wdt_base); |
| 71 | + |
| 72 | + switch (cmd) |
| 73 | + { |
| 74 | + case RT_DEVICE_CTRL_WDT_START: |
| 75 | + WDOG32_Enable(wdt_dev.wdt_base); |
| 76 | + break; |
| 77 | + |
| 78 | + case RT_DEVICE_CTRL_WDT_STOP: |
| 79 | + WDOG32_Disable(wdt_dev.wdt_base); |
| 80 | + break; |
| 81 | + |
| 82 | + case RT_DEVICE_CTRL_WDT_SET_TIMEOUT: |
| 83 | + if (arg != RT_NULL) |
| 84 | + { |
| 85 | + uint32_t timeout = *((uint32_t *)arg); |
| 86 | + timeout = timeout * WDT_CLOCK_SOURCE_FREQ; |
| 87 | + WDOG32_SetTimeoutValue(wdt_dev.wdt_base, timeout); |
| 88 | + } |
| 89 | + break; |
| 90 | + |
| 91 | + default: |
| 92 | + break; |
| 93 | + } |
| 94 | + |
| 95 | + __enable_irq(); |
| 96 | + return RT_EOK; |
| 97 | +} |
| 98 | + |
| 99 | +static struct rt_watchdog_ops wdt_ops = |
| 100 | + { |
| 101 | + wdt_init, |
| 102 | + wdt_control, |
| 103 | +}; |
| 104 | + |
| 105 | +int rt_hw_wdt_init(void) |
| 106 | +{ |
| 107 | + wdt_dev.wdt_base = WDT; |
| 108 | + wdt_dev.watchdog.ops = &wdt_ops; |
| 109 | + |
| 110 | + if (rt_hw_watchdog_register(&wdt_dev.watchdog, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK) |
| 111 | + { |
| 112 | + rt_kprintf("wdt register failed\n"); |
| 113 | + return -RT_ERROR; |
| 114 | + } |
| 115 | + |
| 116 | + return RT_EOK; |
| 117 | +} |
| 118 | + |
| 119 | +INIT_BOARD_EXPORT(rt_hw_wdt_init); |
| 120 | + |
| 121 | +#endif /* RT_USING_WDT */ |
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