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fix(bsp): 重新添加开发板IAR、GCC链接脚本
链接脚本中包含了所有寄存器，除flash与主sarm外其余寄存器已注释
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‎bsp/stm32/stm32h723-lxb-disco/board/linker_scripts/link.icf‎

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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x08000000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; /* 1MB FLASH */
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define symbol __ICFEDIT_region_RAM_start__ = 0x24000000;
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define symbol __ICFEDIT_region_RAM_end__ = 0x2404FFFF; /* 320KB AXI SRAM */
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x0400;
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define symbol __ICFEDIT_size_heap__ = 0x000;
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/**** End of ICF editor section. ###ICF###*/
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/* Commented memory regions for reference */
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/* define symbol __ICFEDIT_region_ITCM_start__ = 0x00000000; */
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/* define symbol __ICFEDIT_region_ITCM_end__ = 0x0000FFFF; /\* 64KB ITCM *\/ */
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/* define symbol __ICFEDIT_region_DTCM_start__ = 0x20000000; */
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/* define symbol __ICFEDIT_region_DTCM_end__ = 0x2001FFFF; /\* 128KB DTCM *\/ */
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/* define symbol __ICFEDIT_region_SRAM2_start__ = 0x30000000; */
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/* define symbol __ICFEDIT_region_SRAM2_end__ = 0x30007FFF; /\* 32KB AHB SRAM D2 *\/ */
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/* define symbol __ICFEDIT_region_SRAM3_start__ = 0x38000000; */
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/* define symbol __ICFEDIT_region_SRAM3_end__ = 0x38003FFF; /\* 16KB AHB SRAM D3 *\/ */
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/* define symbol __ICFEDIT_region_BSRAM_start__ = 0x38800000; */
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/* define symbol __ICFEDIT_region_BSRAM_end__ = 0x38800FFF; /\* 4KB BACKUP SRAM D3 *\/ */
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite, last block CSTACK};

‎bsp/stm32/stm32h723-lxb-disco/board/linker_scripts/link.lds‎

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/*
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* linker script for STM32F4xx with GNU ld
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* bernard.xiong 2009-10-14
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*/
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/* Program Entry, set to mark it as "used" and avoid gc */
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MEMORY
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{
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ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */
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RAM (rw) : ORIGIN = 0x24000000, LENGTH = 320k /* 320K AXI SRAM */
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/* ITCM (rx) : ORIGIN = 0x00000000, LENGTH = 64k /\* 64KB ITCM SRAM *\/ */
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/* DTCM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /\* 128KB DTCM SRAM *\/ */
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/* SRAM2 (rw): ORIGIN = 0x30000000, LENGTH = 32k /\* 32KB AHB SRAM D2 *\/ */
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/* SRAM3 (rw): ORIGIN = 0x38000000, LENGTH = 16k /\* 16KB AHB SRAM D3 *\/ */
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/* BSRAM (rw): ORIGIN = 0x38800000, LENGTH = 4k /\* 4KB BACKUP SRAM D3 *\/ */
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}
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ENTRY(Reset_Handler)
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_system_stack_size = 0x400;
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SECTIONS
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{
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.text :
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{
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. = ALIGN(4);
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_stext = .;
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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*(.text) /* remaining code */
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*(.text.*) /* remaining code */
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*(.rodata) /* read-only data (constants) */
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*(.rodata*)
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*(.glue_7)
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*(.glue_7t)
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*(.gnu.linkonce.t*)
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/* section information for finsh shell */
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. = ALIGN(4);
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__fsymtab_start = .;
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KEEP(*(FSymTab))
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__fsymtab_end = .;
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. = ALIGN(4);
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__vsymtab_start = .;
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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/* section information for initial. */
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. = ALIGN(4);
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__rt_init_start = .;
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KEEP(*(SORT(.rti_fn*)))
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__rt_init_end = .;
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. = ALIGN(4);
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PROVIDE(__ctors_start__ = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE(__ctors_end__ = .);
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. = ALIGN(4);
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_etext = .;
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} > ROM = 0
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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/* This is used by the startup in order to initialize the .data secion */
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_sidata = .;
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} > ROM
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__exidx_end = .;
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/* .data section which is used for initialized data */
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.data : AT (_sidata)
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_sdata = . ;
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d*)
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PROVIDE(__dtors_start__ = .);
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KEEP(*(SORT(.dtors.*)))
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KEEP(*(.dtors))
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PROVIDE(__dtors_end__ = .);
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_edata = . ;
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} >RAM
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.stack :
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{
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. = ALIGN(4);
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_sstack = .;
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. = . + _system_stack_size;
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. = ALIGN(4);
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_estack = .;
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} >RAM
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__bss_start = .;
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.bss :
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{
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .;
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*(.bss)
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*(.bss.*)
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*(COMMON)
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .bss secion */
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_ebss = . ;
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*(.bss.init)
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} > RAM
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__bss_end = .;
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_end = .;
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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* Symbols in the DWARF debugging sections are relative to the beginning
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* of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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}

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