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[BSP/HC32]fix - 1 优化中断中打印日志问题；2 优化SPI写外部FLASH慢的问题 #10009

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Merged
Rbb666 merged 5 commits into from
Feb 24, 2025
Merged

[BSP/HC32]fix - 1 优化中断中打印日志问题；2 优化SPI写外部FLASH慢的问题 #10009

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fca9804
fix - 1 优化中断中打印日志问题；2 优化SPI写外部FLASH慢的问题
JOONH0o Feb 18, 2025
496a232
Update drv_spi.c
JOONH0o Feb 19, 2025
bcb4e23
Update drv_eth.c
JOONH0o Feb 23, 2025
5bef2ee
Update drv_eth.c
JOONH0o Feb 23, 2025
287151d
Update drv_eth.c
JOONH0o Feb 23, 2025
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4 changes: 4 additions & 0 deletions bsp/hc32/libraries/hc32_drivers/drv_eth.c
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Original file line number Diff line number Diff line change
Expand Up @@ -358,7 +358,9 @@ static void hc32_eth_irq_handle(stc_eth_handle_t *eth_handle)
result = eth_device_ready(&(hc32_eth_device.parent));
if (result != RT_EOK)
{
#ifdef ULOG_USING_ISR_LOG
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@Rbb666 Rbb666 Feb 23, 2025

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这块改成：#if !defined(RT_USING_ULOG) || defined(ULOG_USING_ISR_LOG)

LOG_I("eth rx complete callback err = %d", result);
#endif
}
/* Clear the Eth DMA Rx IT pending bits */
ETH_DMA_ClearStatus(ETH_DMA_FLAG_RIS | ETH_DMA_FLAG_NIS);
Expand Down Expand Up @@ -465,7 +467,9 @@ static void eth_phy_irq_handler(void *args)
rt_uint16_t status = 0;

ETH_PHY_ReadReg(&EthHandle, PHY_IISDR, &status);
#ifdef ULOG_USING_ISR_LOG
LOG_D("phy interrupt status reg is 0x%X", status);
#endif
#endif
hc32_phy_link_change();
}
Expand Down
8 changes: 2 additions & 6 deletions bsp/hc32/libraries/hc32_drivers/drv_spi.c
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Original file line number Diff line number Diff line change
Expand Up @@ -473,8 +473,6 @@ static int32_t hc32_spi_dma_trans(struct hc32_spi_config *spi_config, const uint
while ((RESET == DMA_GetTransCompleteStatus(DmaInstance, DmaFlag)) &&
(u32TimeoutCnt < spi_config->timeout))
{
rt_thread_mdelay(1);
u32TimeoutCnt++;
}
if (u32TimeoutCnt >= spi_config->timeout)
{
Expand Down Expand Up @@ -544,7 +542,7 @@ static rt_ssize_t hc32_spi_xfer(struct rt_spi_device *device, struct rt_spi_mess
if (message->send_buf && message->recv_buf)
{
hc32_spi_set_trans_mode(spi_instance, SPI_FULL_DUPLEX);
if ((spi_drv->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX) && (spi_drv->spi_dma_flag & RT_DEVICE_FLAG_DMA_RX))
if ((spi_drv->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX) && (spi_drv->spi_dma_flag & RT_DEVICE_FLAG_DMA_RX) && (send_length > 32))
{
state = hc32_spi_dma_trans(spi_drv->config, send_buf, recv_buf, send_length);
}
Expand All @@ -557,7 +555,7 @@ static rt_ssize_t hc32_spi_xfer(struct rt_spi_device *device, struct rt_spi_mess
else if (message->send_buf)
{
hc32_spi_set_trans_mode(spi_instance, SPI_SEND_ONLY);
if (spi_drv->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX)
if ((spi_drv->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX) && (send_length > 32))
{
state = hc32_spi_dma_trans(spi_drv->config, send_buf, RT_NULL, send_length);
}
Expand Down Expand Up @@ -601,8 +599,6 @@ static rt_ssize_t hc32_spi_xfer(struct rt_spi_device *device, struct rt_spi_mess
while ((RESET == SPI_GetStatus(spi_instance, SPI_FLAG_IDLE)) &&
(u32TimeoutCnt < spi_drv->config->timeout))
{
rt_thread_mdelay(1);
u32TimeoutCnt++;
}
if (u32TimeoutCnt >= spi_drv->config->timeout)
{
Expand Down