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malibertymaliberty
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Merge pull request The-OpenROAD-Project#8332 from gadfort/pdn-grid
pdn: attempt to snap to manufacturing grid before rejecting vias for being off grid
2 parents 313e7ea + 773a32b commit 1c13379

10 files changed

+106
-54
lines changed

‎src/pdn/src/connect.cpp‎

Lines changed: 34 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -447,16 +447,47 @@ void Connect::makeVia(odb::dbSWire* wire,
447447
{
448448
const odb::Rect& lower_rect = lower->getRect();
449449
const odb::Rect& upper_rect = upper->getRect();
450-
const odb::Rect intersection = lower_rect.intersect(upper_rect);
450+
odb::Rect intersection = lower_rect.intersect(upper_rect);
451451

452452
auto* tech = layer0_->getTech();
453+
454+
// Attempt to snap to grid
455+
if (tech->hasManufacturingGrid()) {
456+
const odb::Rect new_intersection(
457+
TechLayer::snapToManufacturingGrid(tech, intersection.xMin(), true, 2),
458+
TechLayer::snapToManufacturingGrid(tech, intersection.yMin(), true, 2),
459+
TechLayer::snapToManufacturingGrid(tech, intersection.xMax(), false, 2),
460+
TechLayer::snapToManufacturingGrid(
461+
tech, intersection.yMax(), false, 2));
462+
if (intersection != new_intersection) {
463+
debugPrint(grid_->getLogger(),
464+
utl::PDN,
465+
"Via",
466+
2,
467+
"intersection changed: {} -> {}",
468+
Shape::getRectText(intersection, tech->getLefUnits()),
469+
Shape::getRectText(new_intersection, tech->getLefUnits()));
470+
intersection = new_intersection;
471+
}
472+
}
473+
453474
const int x = std::round(0.5 * (intersection.xMin() + intersection.xMax()));
454475
const int y = std::round(0.5 * (intersection.yMin() + intersection.yMax()));
455476

456477
// check if off grid and don't add one if it is
457478
if (!TechLayer::checkIfManufacturingGrid(tech, x)
458479
|| !TechLayer::checkIfManufacturingGrid(tech, y)) {
459-
DbGenerateDummyVia dummy_via(this, intersection, layer0_, layer1_, true);
480+
DbGenerateDummyVia dummy_via(
481+
this,
482+
intersection,
483+
layer0_,
484+
layer1_,
485+
true,
486+
fmt::format("({:.4f}, {:.4f}) is off manufacturing grid of {:.4f}",
487+
x / static_cast<double>(tech->getLefUnits()),
488+
y / static_cast<double>(tech->getLefUnits()),
489+
tech->getManufacturingGrid()
490+
/ static_cast<double>(tech->getLefUnits())));
460491
dummy_via.generate(
461492
wire->getBlock(), wire, type, 0, 0, ongrid_, grid_->getLogger());
462493
return;
@@ -559,7 +590,7 @@ void Connect::makeVia(odb::dbSWire* wire,
559590
odb::Rect area = intersection;
560591
xfm.apply(area);
561592
stack.push_back(
562-
new DbGenerateDummyVia(this, area, layer0_, layer1_, false));
593+
new DbGenerateDummyVia(this, area, layer0_, layer1_, false, ""));
563594
break;
564595
}
565596
stack.push_back(new_via);

‎src/pdn/src/via.cpp‎

Lines changed: 23 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1108,12 +1108,14 @@ DbGenerateDummyVia::DbGenerateDummyVia(Connect* connect,
11081108
const odb::Rect& shape,
11091109
odb::dbTechLayer* bottom,
11101110
odb::dbTechLayer* top,
1111-
bool add_report)
1111+
bool add_report,
1112+
const std::string& reason)
11121113
: connect_(connect),
11131114
add_report_(add_report),
11141115
shape_(shape),
11151116
bottom_(bottom),
1116-
top_(top)
1117+
top_(top),
1118+
reason_(reason)
11171119
{
11181120
}
11191121

@@ -1132,11 +1134,13 @@ DbVia::ViaLayerShape DbGenerateDummyVia::generate(
11321134
xfm.apply(via_area);
11331135
logger->warn(utl::PDN,
11341136
110,
1135-
"No via inserted between {} and {} at {} on {}",
1137+
"No via inserted between {} and {} at {} on {}{}{}",
11361138
bottom_->getName(),
11371139
top_->getName(),
11381140
Shape::getRectText(via_area, block->getDbUnitsPerMicron()),
1139-
wire->getNet()->getName());
1141+
wire->getNet()->getName(),
1142+
reason_.empty() ? "" : ": ",
1143+
reason_);
11401144
if (add_report_) {
11411145
connect_->addFailedVia(failedViaReason::BUILD, via_area, wire->getNet());
11421146
}
@@ -1491,8 +1495,9 @@ bool ViaGenerator::checkMinCuts(odb::dbTechLayer* layer, int width) const
14911495
utl::PDN,
14921496
"MinCut",
14931497
1,
1494-
"Layer {} of width {:.4f} has {} min cut rules.",
1498+
"Layer {} (below {}) of width {:.4f} has {} min cut rules.",
14951499
layer->getName(),
1500+
is_below,
14961501
tech_layer.dbuToMicron(width),
14971502
min_rules_use == nullptr ? 0 : min_rules_use->size());
14981503

@@ -1505,17 +1510,19 @@ bool ViaGenerator::checkMinCuts(odb::dbTechLayer* layer, int width) const
15051510
for (const auto& min_cut_rule : *min_rules_use) {
15061511
const bool pass = min_cut_rule.cuts <= total_cuts;
15071512

1508-
debugPrint(
1509-
logger_,
1510-
utl::PDN,
1511-
"MinCut",
1512-
2,
1513-
"Rule width {:.4f} above ({}) or below ({}) requires {} vias: {}.",
1514-
tech_layer.dbuToMicron(min_cut_rule.width),
1515-
min_cut_rule.above,
1516-
min_cut_rule.below,
1517-
min_cut_rule.cuts,
1518-
pass);
1513+
debugPrint(logger_,
1514+
utl::PDN,
1515+
"MinCut",
1516+
2,
1517+
"Rule width {:.4f} above ({}) or below ({}) requires {} vias, "
1518+
"has {} vias {}: {}.",
1519+
tech_layer.dbuToMicron(min_cut_rule.width),
1520+
min_cut_rule.above,
1521+
min_cut_rule.below,
1522+
min_cut_rule.cuts,
1523+
total_cuts,
1524+
is_below ? "below" : "above",
1525+
pass);
15191526

15201527
is_valid |= pass;
15211528
}

‎src/pdn/src/via.h‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -382,7 +382,8 @@ class DbGenerateDummyVia : public DbVia
382382
const odb::Rect& shape,
383383
odb::dbTechLayer* bottom,
384384
odb::dbTechLayer* top,
385-
bool add_report);
385+
bool add_report,
386+
const std::string& reason);
386387

387388
ViaLayerShape generate(odb::dbBlock* block,
388389
odb::dbSWire* wire,
@@ -400,6 +401,7 @@ class DbGenerateDummyVia : public DbVia
400401
const odb::Rect shape_;
401402
odb::dbTechLayer* bottom_;
402403
odb::dbTechLayer* top_;
404+
std::string reason_;
403405
};
404406

405407
// Class to build a generate via, either as a single group or as an array

‎src/pdn/test/macros_cells_via_failure.defok‎

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -250,7 +250,7 @@ TRACKS X 190 DO 578 STEP 3200 LAYER metal9 ;
250250
TRACKS Y 140 DO 499 STEP 3200 LAYER metal9 ;
251251
TRACKS X 190 DO 578 STEP 3200 LAYER metal10 ;
252252
TRACKS Y 140 DO 499 STEP 3200 LAYER metal10 ;
253-
VIAS 10 ;
253+
VIAS 14 ;
254254
- via1_2_960_340_1_3_300_300 + VIARULE Via1Array-0 + CUTSIZE 140 140 + LAYERS metal1 via1 metal2 + CUTSPACING 160 160 + ENCLOSURE 110 100 110 100 + ROWCOL 1 3 ;
255255
- via2_3_960_340_1_3_320_320 + VIARULE Via2Array-0 + CUTSIZE 140 140 + LAYERS metal2 via2 metal3 + CUTSPACING 180 180 + ENCLOSURE 90 100 90 100 + ROWCOL 1 3 ;
256256
- via3_4_960_340_1_3_320_320 + VIARULE Via3Array-0 + CUTSIZE 140 140 + LAYERS metal3 via3 metal4 + CUTSPACING 180 180 + ENCLOSURE 90 100 90 100 + ROWCOL 1 3 ;
@@ -261,6 +261,10 @@ VIAS 10 ;
261261
- via5_6_1860_1860_3_3_600_600 + VIARULE Via5Array-0 + CUTSIZE 280 280 + LAYERS metal5 via5 metal6 + CUTSPACING 320 320 + ENCLOSURE 190 190 190 190 + ROWCOL 3 3 ;
262262
- via5_6_440_1860_3_1_600_600 + VIARULE Via5Array-0 + CUTSIZE 280 280 + LAYERS metal5 via5 metal6 + CUTSPACING 320 320 + ENCLOSURE 80 190 80 190 + ROWCOL 3 1 ;
263263
- via6_7_1860_2800_4_2_600_600 + VIARULE Via6Array-0 + CUTSIZE 280 280 + LAYERS metal6 via6 metal7 + CUTSPACING 320 320 + ENCLOSURE 490 360 490 360 + ROWCOL 4 2 ;
264+
- via4_5_960_370_1_2_600_600 + VIARULE Via4Array-0 + CUTSIZE 280 280 + LAYERS metal4 via4 metal5 + CUTSPACING 320 320 + ENCLOSURE 40 0 0 0 + ROWCOL 1 2 ;
265+
- via5_6_960_370_1_2_600_600 + VIARULE Via5Array-0 + CUTSIZE 280 280 + LAYERS metal5 via5 metal6 + CUTSPACING 320 320 + ENCLOSURE 0 0 0 0 + ROWCOL 1 2 ;
266+
- via6_7_960_370_1_1_600_600 + VIARULE Via6Array-0 + CUTSIZE 280 280 + LAYERS metal6 via6 metal7 + CUTSPACING 320 320 + ENCLOSURE 0 0 260 40 ;
267+
- via5_6_1860_930_2_3_600_600 + VIARULE Via5Array-0 + CUTSIZE 280 280 + LAYERS metal5 via5 metal6 + CUTSPACING 320 320 + ENCLOSURE 0 20 190 0 + ROWCOL 2 3 ;
264268
END VIAS
265269
COMPONENTS 497 ;
266270
- PHY_EDGE_ROW_0_Left_259 TAPCELL_X1 + SOURCE DIST + FIXED ( 19760 19600 ) N ;
@@ -2116,6 +2120,9 @@ SPECIALNETS 2 ;
21162120
NEW metal1 340 + SHAPE FOLLOWPIN ( 19760 33600 ) ( 383800 33600 )
21172121
NEW metal1 340 + SHAPE FOLLOWPIN ( 19760 28000 ) ( 383800 28000 )
21182122
NEW metal1 340 + SHAPE FOLLOWPIN ( 19760 22400 ) ( 383800 22400 )
2123+
NEW metal6 0 + SHAPE STRIPE ( 373150 232380 ) via6_7_960_370_1_1_600_600
2124+
NEW metal5 0 + SHAPE STRIPE ( 373150 232380 ) via5_6_960_370_1_2_600_600
2125+
NEW metal4 0 + SHAPE STRIPE ( 373150 232380 ) via4_5_960_370_1_2_600_600
21192126
NEW metal6 0 + SHAPE STRIPE ( 373150 173600 ) via6_7_960_2800_4_1_600_600
21202127
NEW metal5 0 + SHAPE STRIPE ( 373150 173600 ) via5_6_960_2800_5_2_600_600
21212128
NEW metal4 0 + SHAPE STRIPE ( 373150 173600 ) via4_5_960_2800_5_2_600_600
@@ -2772,6 +2779,7 @@ SPECIALNETS 2 ;
27722779
NEW metal6 1860 + SHAPE STRIPE ( 126320 202200 ) ( 126320 327810 )
27732780
NEW metal6 1860 + SHAPE STRIPE ( 106320 202200 ) ( 106320 327810 )
27742781
NEW metal6 1860 + SHAPE STRIPE ( 86320 202200 ) ( 86320 327810 )
2782+
NEW metal5 930 + SHAPE STRIPE ( 85390 327345 ) ( 147250 327345 )
27752783
NEW metal5 1860 + SHAPE STRIPE ( 85390 307810 ) ( 150720 307810 )
27762784
NEW metal5 1860 + SHAPE STRIPE ( 85390 287810 ) ( 150720 287810 )
27772785
NEW metal5 1860 + SHAPE STRIPE ( 85390 267810 ) ( 150720 267810 )
@@ -2790,24 +2798,28 @@ SPECIALNETS 2 ;
27902798
NEW metal6 0 + SHAPE STRIPE ( 86320 323600 ) via6_7_1860_2800_4_2_600_600
27912799
NEW metal6 0 + SHAPE STRIPE ( 86320 263600 ) via6_7_1860_2800_4_2_600_600
27922800
NEW metal6 0 + SHAPE STRIPE ( 86320 203600 ) via6_7_1860_2800_4_2_600_600
2801+
NEW metal5 0 + SHAPE STRIPE ( 146320 327340 ) via5_6_1860_930_2_3_600_600
27932802
NEW metal5 0 + SHAPE STRIPE ( 146320 307810 ) via5_6_1860_1860_3_3_600_600
27942803
NEW metal5 0 + SHAPE STRIPE ( 146320 287810 ) via5_6_1860_1860_3_3_600_600
27952804
NEW metal5 0 + SHAPE STRIPE ( 146320 267810 ) via5_6_1860_1860_3_3_600_600
27962805
NEW metal5 0 + SHAPE STRIPE ( 146320 247810 ) via5_6_1860_1860_3_3_600_600
27972806
NEW metal5 0 + SHAPE STRIPE ( 146320 227810 ) via5_6_1860_1860_3_3_600_600
27982807
NEW metal5 0 + SHAPE STRIPE ( 146320 207810 ) via5_6_1860_1860_3_3_600_600
2808+
NEW metal5 0 + SHAPE STRIPE ( 126320 327340 ) via5_6_1860_930_2_3_600_600
27992809
NEW metal5 0 + SHAPE STRIPE ( 126320 307810 ) via5_6_1860_1860_3_3_600_600
28002810
NEW metal5 0 + SHAPE STRIPE ( 126320 287810 ) via5_6_1860_1860_3_3_600_600
28012811
NEW metal5 0 + SHAPE STRIPE ( 126320 267810 ) via5_6_1860_1860_3_3_600_600
28022812
NEW metal5 0 + SHAPE STRIPE ( 126320 247810 ) via5_6_1860_1860_3_3_600_600
28032813
NEW metal5 0 + SHAPE STRIPE ( 126320 227810 ) via5_6_1860_1860_3_3_600_600
28042814
NEW metal5 0 + SHAPE STRIPE ( 126320 207810 ) via5_6_1860_1860_3_3_600_600
2815+
NEW metal5 0 + SHAPE STRIPE ( 106320 327340 ) via5_6_1860_930_2_3_600_600
28052816
NEW metal5 0 + SHAPE STRIPE ( 106320 307810 ) via5_6_1860_1860_3_3_600_600
28062817
NEW metal5 0 + SHAPE STRIPE ( 106320 287810 ) via5_6_1860_1860_3_3_600_600
28072818
NEW metal5 0 + SHAPE STRIPE ( 106320 267810 ) via5_6_1860_1860_3_3_600_600
28082819
NEW metal5 0 + SHAPE STRIPE ( 106320 247810 ) via5_6_1860_1860_3_3_600_600
28092820
NEW metal5 0 + SHAPE STRIPE ( 106320 227810 ) via5_6_1860_1860_3_3_600_600
28102821
NEW metal5 0 + SHAPE STRIPE ( 106320 207810 ) via5_6_1860_1860_3_3_600_600
2822+
NEW metal5 0 + SHAPE STRIPE ( 86320 327340 ) via5_6_1860_930_2_3_600_600
28112823
NEW metal5 0 + SHAPE STRIPE ( 86320 307810 ) via5_6_1860_1860_3_3_600_600
28122824
NEW metal5 0 + SHAPE STRIPE ( 86320 287810 ) via5_6_1860_1860_3_3_600_600
28132825
NEW metal5 0 + SHAPE STRIPE ( 86320 267810 ) via5_6_1860_1860_3_3_600_600

‎src/pdn/test/macros_cells_via_failure.ok‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -8,10 +8,4 @@
88
[INFO PDN-0001] Inserting grid: grid
99
[INFO PDN-0001] Inserting grid: CORE_macro_grid_1 - dcache.data.data_arrays_0.data_arrays_0_ext.mem
1010
[INFO PDN-0001] Inserting grid: CORE_macro_grid_1 - frontend.icache.data_arrays_0.data_arrays_0_0_ext.mem
11-
[WARNING PDN-0110] No via inserted between metal4 and metal7 at (186.3350, 116.1000) - (186.8150, 116.2850) on VDD
12-
[WARNING PDN-0110] No via inserted between metal5 and metal6 at (42.6950, 163.4400) - (43.6250, 163.9050) on VSS
13-
[WARNING PDN-0110] No via inserted between metal5 and metal6 at (52.6950, 163.4400) - (53.6250, 163.9050) on VSS
14-
[WARNING PDN-0110] No via inserted between metal5 and metal6 at (62.6950, 163.4400) - (63.6250, 163.9050) on VSS
15-
[WARNING PDN-0110] No via inserted between metal5 and metal6 at (72.6950, 163.4400) - (73.6250, 163.9050) on VSS
16-
[WARNING PDN-0200] Removing floating shape: VSS (42.6950, 163.4400) - (73.6250, 163.9050) on metal5
1711
No differences found.

‎src/pdn/test/pads_black_parrot_flipchip.defok‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1881,7 +1881,7 @@ TRACKS X 190 DO 1875 STEP 3200 LAYER metal9 ;
18811881
TRACKS Y 140 DO 1875 STEP 3200 LAYER metal9 ;
18821882
TRACKS X 190 DO 1875 STEP 3200 LAYER metal10 ;
18831883
TRACKS Y 140 DO 1875 STEP 3200 LAYER metal10 ;
1884-
VIAS 19 ;
1884+
VIAS 23 ;
18851885
- via7_8_10000_2800_2_6_1680_1680 + VIARULE Via7Array-0 + CUTSIZE 800 800 + LAYERS metal7 via7 metal8 + CUTSPACING 880 880 + ENCLOSURE 0 160 400 0 + ROWCOL 2 6 ;
18861886
- via7_8_10000_1580_1_6_1680_1680 + VIARULE Via7Array-0 + CUTSIZE 800 800 + LAYERS metal7 via7 metal8 + CUTSPACING 880 880 + ENCLOSURE 400 390 400 0 + ROWCOL 1 6 ;
18871887
- via7_8_2800_2800_2_2_1680_1680 + VIARULE Via7Array-0 + CUTSIZE 800 800 + LAYERS metal7 via7 metal8 + CUTSPACING 880 880 + ENCLOSURE 0 160 160 0 + ROWCOL 2 2 ;
@@ -1892,14 +1892,18 @@ VIAS 19 ;
18921892
- via8_9_2800_2800_1_1_1680_1680 + VIARULE Via8Array-0 + CUTSIZE 800 800 + LAYERS metal8 via8 metal9 + CUTSPACING 880 880 + ENCLOSURE 1000 0 400 1000 ;
18931893
- via8_9_1580_10000_6_1_1680_1680 + VIARULE Via8Array-0 + CUTSIZE 800 800 + LAYERS metal8 via8 metal9 + CUTSPACING 880 880 + ENCLOSURE 390 400 400 400 + ROWCOL 6 1 ;
18941894
- via9_10_27340_1580_1_8_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 1110 -10 1110 -10 + ROWCOL 1 8 ;
1895+
- via9_10_27340_1530_1_8_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 1110 -30 1110 -30 + ROWCOL 1 8 ;
18951896
- via9_10_41340_1580_1_12_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 1390 -10 1390 -10 + ROWCOL 1 12 ;
1897+
- via9_10_41340_1530_1_12_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 1390 -30 1390 -30 + ROWCOL 1 12 ;
18961898
- via9_10_26140_1580_1_8_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 510 -10 510 -10 + ROWCOL 1 8 ;
18971899
- via9_10_61060_2800_1_18_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 0 600 1170 600 + ROWCOL 1 18 ;
18981900
- via9_10_20000_10000_3_6_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 0 840 800 840 + ROWCOL 3 6 ;
18991901
- via9_10_20000_2800_1_6_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 0 600 800 600 + ROWCOL 1 6 ;
19001902
- via9_10_300000_2800_1_89_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 0 600 1360 600 + ROWCOL 1 89 ;
19011903
- via9_10_60880_2800_1_18_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 0 600 1080 600 + ROWCOL 1 18 ;
1904+
- via9_10_41520_1530_1_12_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 1480 -30 1480 -30 + ROWCOL 1 12 ;
19021905
- via9_10_41520_1580_1_12_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 1480 -10 1480 -10 + ROWCOL 1 12 ;
1906+
- via9_10_27520_1530_1_8_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 1200 -30 1200 -30 + ROWCOL 1 8 ;
19031907
- via9_10_27520_1580_1_8_3360_3360 + VIARULE Via9Array-0 + CUTSIZE 1600 1600 + LAYERS metal9 via9 metal10 + CUTSPACING 1760 1760 + ENCLOSURE 1200 -10 1200 -10 + ROWCOL 1 8 ;
19041908
END VIAS
19051909
COMPONENTS 1489 ;

‎src/pdn/test/pads_black_parrot_flipchip.ok‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,11 @@
66
[INFO ODB-0132] Created 143 special nets and 883 connections.
77
[INFO ODB-0133] Created 219 nets and 267 connections.
88
[INFO PDN-0001] Inserting grid: Core
9-
[WARNING PDN-0110] No via inserted between metal9 and metal10 at (174.9000, 1349.2350) - (188.5700, 1350.0000) on VSS
10-
[WARNING PDN-0110] No via inserted between metal9 and metal10 at (174.9000, 1829.2350) - (188.5700, 1830.0000) on VSS
11-
[WARNING PDN-0110] No via inserted between metal9 and metal10 at (174.9000, 2464.2350) - (195.5700, 2465.0000) on VDD
12-
[WARNING PDN-0110] No via inserted between metal9 and metal10 at (2804.3400, 1660.0000) - (2825.1000, 1660.7650) on VDD
13-
[WARNING PDN-0110] No via inserted between metal9 and metal10 at (2804.3400, 2295.0000) - (2825.1000, 2295.7650) on VDD
14-
[WARNING PDN-0110] No via inserted between metal9 and metal10 at (2811.3400, 535.0000) - (2825.1000, 535.7650) on VSS
15-
[WARNING PDN-0110] No via inserted between metal9 and metal10 at (2811.3400, 1175.0000) - (2825.1000, 1175.7650) on VSS
9+
[WARNING PDN-0195] Removing 1 via(s) between metal9 and metal10 at (181.7350 um, 1349.6200 um) for VSS
10+
[WARNING PDN-0195] Removing 1 via(s) between metal9 and metal10 at (181.7350 um, 1829.6200 um) for VSS
11+
[WARNING PDN-0195] Removing 1 via(s) between metal9 and metal10 at (185.2350 um, 2464.6200 um) for VDD
12+
[WARNING PDN-0195] Removing 1 via(s) between metal9 and metal10 at (2814.7200 um, 1660.3800 um) for VDD
13+
[WARNING PDN-0195] Removing 1 via(s) between metal9 and metal10 at (2814.7200 um, 2295.3800 um) for VDD
14+
[WARNING PDN-0195] Removing 1 via(s) between metal9 and metal10 at (2818.2200 um, 535.3800 um) for VSS
15+
[WARNING PDN-0195] Removing 1 via(s) between metal9 and metal10 at (2818.2200 um, 1175.3800 um) for VSS
1616
No differences found.

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