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Revert "parisc: Revert "Release spinlocks using ordered store""
This reverts commit 86d4d06. Signed-off-by: Helge Deller <[email protected]> Cc: <[email protected]> # v5.0+
1 parent 6e9f06e commit 157e9af

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2 files changed

+6
-10
lines changed

2 files changed

+6
-10
lines changed

arch/parisc/include/asm/spinlock.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,8 +37,8 @@ static inline void arch_spin_unlock(arch_spinlock_t *x)
3737
volatile unsigned int *a;
3838

3939
a = __ldcw_align(x);
40-
mb();
41-
*a = 1;
40+
/* Release with ordered store. */
41+
__asm__ __volatile__("stw,ma %0,0(%1)" : : "r"(1), "r"(a) : "memory");
4242
}
4343

4444
static inline int arch_spin_trylock(arch_spinlock_t *x)

arch/parisc/kernel/syscall.S

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -640,8 +640,7 @@ cas_action:
640640
sub,<> %r28, %r25, %r0
641641
2: stw %r24, 0(%r26)
642642
/* Free lock */
643-
sync
644-
stw %r20, 0(%sr2,%r20)
643+
stw,ma %r20, 0(%sr2,%r20)
645644
#if ENABLE_LWS_DEBUG
646645
/* Clear thread register indicator */
647646
stw %r0, 4(%sr2,%r20)
@@ -655,8 +654,7 @@ cas_action:
655654
3:
656655
/* Error occurred on load or store */
657656
/* Free lock */
658-
sync
659-
stw %r20, 0(%sr2,%r20)
657+
stw,ma %r20, 0(%sr2,%r20)
660658
#if ENABLE_LWS_DEBUG
661659
stw %r0, 4(%sr2,%r20)
662660
#endif
@@ -857,8 +855,7 @@ cas2_action:
857855

858856
cas2_end:
859857
/* Free lock */
860-
sync
861-
stw %r20, 0(%sr2,%r20)
858+
stw,ma %r20, 0(%sr2,%r20)
862859
/* Enable interrupts */
863860
ssm PSW_SM_I, %r0
864861
/* Return to userspace, set no error */
@@ -868,8 +865,7 @@ cas2_end:
868865
22:
869866
/* Error occurred on load or store */
870867
/* Free lock */
871-
sync
872-
stw %r20, 0(%sr2,%r20)
868+
stw,ma %r20, 0(%sr2,%r20)
873869
ssm PSW_SM_I, %r0
874870
ldo 1(%r0),%r28
875871
b lws_exit

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