Skip to content

Commit 1bafeaf

Browse files
committed
Merge tag 'drm-xe-fixes-2024-04-11' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes
- Fix double display mutex initializations - Fix u32 -> u64 implicit conversions - Fix RING_CONTEXT_CONTROL not marked as masked Signed-off-by: Dave Airlie <[email protected]> From: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ewvvtgcb2gonxvccws6nt6fqswoyfp4g43t5ex24vpqwtrxdzm@hgjoz5uirmxx
2 parents 1b24b3c + f76646c commit 1bafeaf

File tree

5 files changed

+9
-15
lines changed

5 files changed

+9
-15
lines changed

drivers/gpu/drm/xe/display/xe_display.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -108,11 +108,6 @@ int xe_display_create(struct xe_device *xe)
108108
xe->display.hotplug.dp_wq = alloc_ordered_workqueue("xe-dp", 0);
109109

110110
drmm_mutex_init(&xe->drm, &xe->sb_lock);
111-
drmm_mutex_init(&xe->drm, &xe->display.backlight.lock);
112-
drmm_mutex_init(&xe->drm, &xe->display.audio.mutex);
113-
drmm_mutex_init(&xe->drm, &xe->display.wm.wm_mutex);
114-
drmm_mutex_init(&xe->drm, &xe->display.pps.mutex);
115-
drmm_mutex_init(&xe->drm, &xe->display.hdcp.hdcp_mutex);
116111
xe->enabled_irq_mask = ~0;
117112

118113
err = drmm_add_action_or_reset(&xe->drm, display_destroy, NULL);

drivers/gpu/drm/xe/regs/xe_engine_regs.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@
125125
#define RING_EXECLIST_STATUS_LO(base) XE_REG((base) + 0x234)
126126
#define RING_EXECLIST_STATUS_HI(base) XE_REG((base) + 0x234 + 4)
127127

128-
#define RING_CONTEXT_CONTROL(base) XE_REG((base) + 0x244)
128+
#define RING_CONTEXT_CONTROL(base) XE_REG((base) + 0x244, XE_REG_OPTION_MASKED)
129129
#define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH REG_BIT(3)
130130
#define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT REG_BIT(0)
131131

drivers/gpu/drm/xe/xe_hwmon.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -290,7 +290,7 @@ xe_hwmon_power1_max_interval_show(struct device *dev, struct device_attribute *a
290290
* As y can be < 2, we compute tau4 = (4 | x) << y
291291
* and then add 2 when doing the final right shift to account for units
292292
*/
293-
tau4 = ((1 << x_w) | x) << y;
293+
tau4 = (u64)((1 << x_w) | x) << y;
294294

295295
/* val in hwmon interface units (millisec) */
296296
out = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
@@ -330,7 +330,7 @@ xe_hwmon_power1_max_interval_store(struct device *dev, struct device_attribute *
330330
r = FIELD_PREP(PKG_MAX_WIN, PKG_MAX_WIN_DEFAULT);
331331
x = REG_FIELD_GET(PKG_MAX_WIN_X, r);
332332
y = REG_FIELD_GET(PKG_MAX_WIN_Y, r);
333-
tau4 = ((1 << x_w) | x) << y;
333+
tau4 = (u64)((1 << x_w) | x) << y;
334334
max_win = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
335335

336336
if (val > max_win)

drivers/gpu/drm/xe/xe_lrc.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -525,9 +525,8 @@ static const u8 *reg_offsets(struct xe_device *xe, enum xe_engine_class class)
525525

526526
static void set_context_control(u32 *regs, struct xe_hw_engine *hwe)
527527
{
528-
regs[CTX_CONTEXT_CONTROL] = _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH) |
529-
_MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) |
530-
CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT;
528+
regs[CTX_CONTEXT_CONTROL] = _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH |
529+
CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
531530

532531
/* TODO: Timestamp */
533532
}

drivers/gpu/drm/xe/xe_migrate.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -227,15 +227,15 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m,
227227
if (vm->flags & XE_VM_FLAG_64K && level == 1)
228228
flags = XE_PDE_64K;
229229

230-
entry = vm->pt_ops->pde_encode_bo(bo, map_ofs + (level - 1) *
230+
entry = vm->pt_ops->pde_encode_bo(bo, map_ofs + (u64)(level - 1) *
231231
XE_PAGE_SIZE, pat_index);
232232
xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE * level, u64,
233233
entry | flags);
234234
}
235235

236236
/* Write PDE's that point to our BO. */
237237
for (i = 0; i < num_entries - num_level; i++) {
238-
entry = vm->pt_ops->pde_encode_bo(bo, i * XE_PAGE_SIZE,
238+
entry = vm->pt_ops->pde_encode_bo(bo, (u64)i * XE_PAGE_SIZE,
239239
pat_index);
240240

241241
xe_map_wr(xe, &bo->vmap, map_ofs + XE_PAGE_SIZE +
@@ -291,7 +291,7 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m,
291291
#define VM_SA_UPDATE_UNIT_SIZE (XE_PAGE_SIZE / NUM_VMUSA_UNIT_PER_PAGE)
292292
#define NUM_VMUSA_WRITES_PER_UNIT (VM_SA_UPDATE_UNIT_SIZE / sizeof(u64))
293293
drm_suballoc_manager_init(&m->vm_update_sa,
294-
(map_ofs / XE_PAGE_SIZE - NUM_KERNEL_PDE) *
294+
(size_t)(map_ofs / XE_PAGE_SIZE - NUM_KERNEL_PDE) *
295295
NUM_VMUSA_UNIT_PER_PAGE, 0);
296296

297297
m->pt_bo = bo;
@@ -490,7 +490,7 @@ static void emit_pte(struct xe_migrate *m,
490490
struct xe_vm *vm = m->q->vm;
491491
u16 pat_index;
492492
u32 ptes;
493-
u64 ofs = at_pt * XE_PAGE_SIZE;
493+
u64 ofs = (u64)at_pt * XE_PAGE_SIZE;
494494
u64 cur_ofs;
495495

496496
/* Indirect access needs compression enabled uncached PAT index */

0 commit comments

Comments
 (0)