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robclarkairlied
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drm/msm: fix 32b build warns
Neither of these code-paths apply to older 32b devices, but it is rude to introduce warnings. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/msm/adreno/adreno_gpu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -209,7 +209,7 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu,
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size = iommu->geometry.aperture_end - start + 1;
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aspace = msm_gem_address_space_create(mmu, "gpu",
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start & GENMASK(48, 0), size);
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start & GENMASK_ULL(48, 0), size);
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if (IS_ERR(aspace) && !IS_ERR(mmu))
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mmu->funcs->destroy(mmu);

drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -879,7 +879,7 @@ struct msm_dsi_pll *msm_dsi_pll_7nm_init(struct platform_device *pdev, int id)
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pll->max_rate = 3500000000UL;
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if (pll->type == MSM_DSI_PHY_7NM_V4_1) {
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pll->min_rate = 600000000UL;
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pll->max_rate = 5000000000UL;
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pll->max_rate = (unsigned long)5000000000ULL;
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/* workaround for max rate overflowing on 32-bit builds: */
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pll->max_rate = max(pll->max_rate, 0xffffffffUL);
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}

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