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Evan Quanalexdeucher
Evan Quan
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alexdeucher
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drm/amd/powerplay: implement smu_cmn_get_enabled_mask() for all ASICs
Instead of having each for smu v11 and v12. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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10 files changed

+42
-66
lines changed

10 files changed

+42
-66
lines changed

‎drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1824,7 +1824,7 @@ static bool arcturus_is_dpm_running(struct smu_context *smu)
18241824
int ret = 0;
18251825
uint32_t feature_mask[2];
18261826
unsigned long feature_enabled;
1827-
ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
1827+
ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
18281828
feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
18291829
((uint64_t)feature_mask[1] << 32));
18301830
return !!(feature_enabled & SMC_DPM_FEATURE);
@@ -2284,7 +2284,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
22842284
.send_smc_msg_with_param = smu_v11_0_send_msg_with_param,
22852285
.init_display_count = NULL,
22862286
.set_allowed_mask = smu_v11_0_set_allowed_mask,
2287-
.get_enabled_mask = smu_v11_0_get_enabled_mask,
2287+
.get_enabled_mask = smu_cmn_get_enabled_mask,
22882288
.feature_is_enabled = smu_cmn_feature_is_enabled,
22892289
.notify_display_change = NULL,
22902290
.set_power_limit = smu_v11_0_set_power_limit,

‎drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -177,9 +177,6 @@ int smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count);
177177

178178
int smu_v11_0_set_allowed_mask(struct smu_context *smu);
179179

180-
int smu_v11_0_get_enabled_mask(struct smu_context *smu,
181-
uint32_t *feature_mask, uint32_t num);
182-
183180
int smu_v11_0_notify_display_change(struct smu_context *smu);
184181

185182
int smu_v11_0_get_current_power_limit(struct smu_context *smu,

‎drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -64,9 +64,6 @@ int smu_v12_0_fini_smc_tables(struct smu_context *smu);
6464

6565
int smu_v12_0_set_default_dpm_tables(struct smu_context *smu);
6666

67-
int smu_v12_0_get_enabled_mask(struct smu_context *smu,
68-
uint32_t *feature_mask, uint32_t num);
69-
7067
int smu_v12_0_mode2_reset(struct smu_context *smu);
7168

7269
int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,

‎drivers/gpu/drm/amd/powerplay/navi10_ppt.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1321,7 +1321,7 @@ static bool navi10_is_dpm_running(struct smu_context *smu)
13211321
int ret = 0;
13221322
uint32_t feature_mask[2];
13231323
unsigned long feature_enabled;
1324-
ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
1324+
ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
13251325
feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
13261326
((uint64_t)feature_mask[1] << 32));
13271327
return !!(feature_enabled & SMC_DPM_FEATURE);
@@ -2299,7 +2299,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
22992299
.send_smc_msg_with_param = smu_v11_0_send_msg_with_param,
23002300
.init_display_count = smu_v11_0_init_display_count,
23012301
.set_allowed_mask = smu_v11_0_set_allowed_mask,
2302-
.get_enabled_mask = smu_v11_0_get_enabled_mask,
2302+
.get_enabled_mask = smu_cmn_get_enabled_mask,
23032303
.feature_is_enabled = smu_cmn_feature_is_enabled,
23042304
.notify_display_change = smu_v11_0_notify_display_change,
23052305
.set_power_limit = smu_v11_0_set_power_limit,

‎drivers/gpu/drm/amd/powerplay/renoir_ppt.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1018,7 +1018,7 @@ static const struct pptable_funcs renoir_ppt_funcs = {
10181018
.init_smc_tables = smu_v12_0_init_smc_tables,
10191019
.fini_smc_tables = smu_v12_0_fini_smc_tables,
10201020
.set_default_dpm_table = smu_v12_0_set_default_dpm_tables,
1021-
.get_enabled_mask = smu_v12_0_get_enabled_mask,
1021+
.get_enabled_mask = smu_cmn_get_enabled_mask,
10221022
.feature_is_enabled = smu_cmn_feature_is_enabled,
10231023
.get_dpm_ultimate_freq = renoir_get_dpm_ultimate_freq,
10241024
.mode2_reset = smu_v12_0_mode2_reset,

‎drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1124,7 +1124,7 @@ static bool sienna_cichlid_is_dpm_running(struct smu_context *smu)
11241124
int ret = 0;
11251125
uint32_t feature_mask[2];
11261126
unsigned long feature_enabled;
1127-
ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
1127+
ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
11281128
feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
11291129
((uint64_t)feature_mask[1] << 32));
11301130
return !!(feature_enabled & SMC_DPM_FEATURE);
@@ -2450,7 +2450,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
24502450
.send_smc_msg_with_param = smu_v11_0_send_msg_with_param,
24512451
.init_display_count = NULL,
24522452
.set_allowed_mask = smu_v11_0_set_allowed_mask,
2453-
.get_enabled_mask = smu_v11_0_get_enabled_mask,
2453+
.get_enabled_mask = smu_cmn_get_enabled_mask,
24542454
.feature_is_enabled = smu_cmn_feature_is_enabled,
24552455
.notify_display_change = NULL,
24562456
.set_power_limit = smu_v11_0_set_power_limit,

‎drivers/gpu/drm/amd/powerplay/smu_cmn.c

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -162,3 +162,33 @@ int smu_cmn_feature_is_enabled(struct smu_context *smu,
162162

163163
return ret;
164164
}
165+
166+
int smu_cmn_get_enabled_mask(struct smu_context *smu,
167+
uint32_t *feature_mask,
168+
uint32_t num)
169+
{
170+
uint32_t feature_mask_high = 0, feature_mask_low = 0;
171+
struct smu_feature *feature = &smu->smu_feature;
172+
int ret = 0;
173+
174+
if (!feature_mask || num < 2)
175+
return -EINVAL;
176+
177+
if (bitmap_empty(feature->enabled, feature->feature_num)) {
178+
ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh, &feature_mask_high);
179+
if (ret)
180+
return ret;
181+
182+
ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesLow, &feature_mask_low);
183+
if (ret)
184+
return ret;
185+
186+
feature_mask[0] = feature_mask_low;
187+
feature_mask[1] = feature_mask_high;
188+
} else {
189+
bitmap_copy((unsigned long *)feature_mask, feature->enabled,
190+
feature->feature_num);
191+
}
192+
193+
return ret;
194+
}

‎drivers/gpu/drm/amd/powerplay/smu_cmn.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,4 +35,8 @@ int smu_cmn_feature_is_supported(struct smu_context *smu,
3535
int smu_cmn_feature_is_enabled(struct smu_context *smu,
3636
enum smu_feature_mask mask);
3737

38+
int smu_cmn_get_enabled_mask(struct smu_context *smu,
39+
uint32_t *feature_mask,
40+
uint32_t num);
41+
3842
#endif

‎drivers/gpu/drm/amd/powerplay/smu_v11_0.c

Lines changed: 1 addition & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -871,35 +871,6 @@ int smu_v11_0_set_allowed_mask(struct smu_context *smu)
871871
return ret;
872872
}
873873

874-
int smu_v11_0_get_enabled_mask(struct smu_context *smu,
875-
uint32_t *feature_mask, uint32_t num)
876-
{
877-
uint32_t feature_mask_high = 0, feature_mask_low = 0;
878-
struct smu_feature *feature = &smu->smu_feature;
879-
int ret = 0;
880-
881-
if (!feature_mask || num < 2)
882-
return -EINVAL;
883-
884-
if (bitmap_empty(feature->enabled, feature->feature_num)) {
885-
ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh, &feature_mask_high);
886-
if (ret)
887-
return ret;
888-
889-
ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesLow, &feature_mask_low);
890-
if (ret)
891-
return ret;
892-
893-
feature_mask[0] = feature_mask_low;
894-
feature_mask[1] = feature_mask_high;
895-
} else {
896-
bitmap_copy((unsigned long *)feature_mask, feature->enabled,
897-
feature->feature_num);
898-
}
899-
900-
return ret;
901-
}
902-
903874
int smu_v11_0_system_features_control(struct smu_context *smu,
904875
bool en)
905876
{
@@ -916,7 +887,7 @@ int smu_v11_0_system_features_control(struct smu_context *smu,
916887
bitmap_zero(feature->supported, feature->feature_num);
917888

918889
if (en) {
919-
ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
890+
ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
920891
if (ret)
921892
return ret;
922893

‎drivers/gpu/drm/amd/powerplay/smu_v12_0.c

Lines changed: 0 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -296,29 +296,6 @@ int smu_v12_0_set_default_dpm_tables(struct smu_context *smu)
296296
return smu_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false);
297297
}
298298

299-
int smu_v12_0_get_enabled_mask(struct smu_context *smu,
300-
uint32_t *feature_mask, uint32_t num)
301-
{
302-
uint32_t feature_mask_high = 0, feature_mask_low = 0;
303-
int ret = 0;
304-
305-
if (!feature_mask || num < 2)
306-
return -EINVAL;
307-
308-
ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesHigh, &feature_mask_high);
309-
if (ret)
310-
return ret;
311-
312-
ret = smu_send_smc_msg(smu, SMU_MSG_GetEnabledSmuFeaturesLow, &feature_mask_low);
313-
if (ret)
314-
return ret;
315-
316-
feature_mask[0] = feature_mask_low;
317-
feature_mask[1] = feature_mask_high;
318-
319-
return ret;
320-
}
321-
322299
int smu_v12_0_mode2_reset(struct smu_context *smu){
323300
return smu_v12_0_send_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset, SMU_RESET_MODE_2, NULL);
324301
}

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