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LoongArch: dts: DeviceTree for Loongson-2K2000
Add DeviceTree file for Loongson-2K2000 processor, which integrates two 64-bit 3-issue superscalar LA364 processor cores. Signed-off-by: Binbin Zhou <[email protected]> Signed-off-by: Huacai Chen <[email protected]>
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‎arch/loongarch/boot/dts/Makefile

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# SPDX-License-Identifier: GPL-2.0-only
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3-
dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb
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dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb
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obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))

‎arch/loongarch/boot/dts/loongson-2k2000-ref.dts

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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/dts-v1/;
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#include "loongson-2k2000.dtsi"
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/ {
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compatible = "loongson,ls2k2000-ref", "loongson,ls2k2000";
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model = "Loongson-2K2000 Reference Board";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@200000 {
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device_type = "memory";
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reg = <0x0 0x00200000 0x0 0x0ee00000>,
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<0x0 0x90000000 0x0 0x70000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x0 0x2000000>;
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linux,cma-default;
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};
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};
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};
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&sata {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&rtc0 {
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status = "okay";
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};
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&xhci0 {
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status = "okay";
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};
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&xhci1 {
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status = "okay";
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};
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&gmac0 {
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status = "okay";
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};
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&gmac1 {
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status = "okay";
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};
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&gmac2 {
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status = "okay";
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};

‎arch/loongarch/boot/dts/loongson-2k2000.dtsi

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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/dts-v1/;
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@1 {
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compatible = "loongson,la364";
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device_type = "cpu";
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reg = <0x0>;
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clocks = <&cpu_clk>;
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};
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cpu1: cpu@2 {
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compatible = "loongson,la364";
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device_type = "cpu";
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reg = <0x1>;
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clocks = <&cpu_clk>;
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};
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};
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cpu_clk: cpu-clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1400000000>;
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};
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cpuintc: interrupt-controller {
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compatible = "loongson,cpu-interrupt-controller";
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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bus@10000000 {
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compatible = "simple-bus";
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ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
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<0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
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<0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
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<0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
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#address-cells = <2>;
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#size-cells = <2>;
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pmc: power-management@100d0000 {
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compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon";
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reg = <0x0 0x100d0000 0x0 0x58>;
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interrupt-parent = <&eiointc>;
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interrupts = <47>;
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loongson,suspend-address = <0x0 0x1c000500>;
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syscon-reboot {
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compatible = "syscon-reboot";
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offset = <0x30>;
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mask = <0x1>;
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};
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syscon-poweroff {
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compatible = "syscon-poweroff";
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regmap = <&pmc>;
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offset = <0x14>;
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mask = <0x3c00>;
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value = <0x3c00>;
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};
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};
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liointc: interrupt-controller@1fe01400 {
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compatible = "loongson,liointc-1.0";
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reg = <0x0 0x1fe01400 0x0 0x64>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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interrupt-names = "int0";
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loongson,parent_int_map = <0xffffffff>, /* int0 */
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<0x00000000>, /* int1 */
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<0x00000000>, /* int2 */
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<0x00000000>; /* int3 */
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};
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eiointc: interrupt-controller@1fe01600 {
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compatible = "loongson,ls2k2000-eiointc";
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reg = <0x0 0x1fe01600 0x0 0xea00>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <3>;
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};
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pic: interrupt-controller@10000000 {
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compatible = "loongson,pch-pic-1.0";
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reg = <0x0 0x10000000 0x0 0x400>;
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interrupt-controller;
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#interrupt-cells = <2>;
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loongson,pic-base-vec = <0>;
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interrupt-parent = <&eiointc>;
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};
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msi: msi-controller@1fe01140 {
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compatible = "loongson,pch-msi-1.0";
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reg = <0x0 0x1fe01140 0x0 0x8>;
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msi-controller;
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loongson,msi-base-vec = <64>;
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loongson,msi-num-vecs = <192>;
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interrupt-parent = <&eiointc>;
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};
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rtc0: rtc@100d0100 {
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compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc";
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reg = <0x0 0x100d0100 0x0 0x100>;
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interrupt-parent = <&pic>;
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interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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uart0: serial@1fe001e0 {
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compatible = "ns16550a";
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reg = <0x0 0x1fe001e0 0x0 0x10>;
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clock-frequency = <100000000>;
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interrupt-parent = <&liointc>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
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no-loopback-test;
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status = "disabled";
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};
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pcie@1a000000 {
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compatible = "loongson,ls2k-pci";
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reg = <0x0 0x1a000000 0x0 0x02000000>,
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<0xfe 0x0 0x0 0x20000000>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x0 0xff>;
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ranges = <0x01000000 0x0 0x00008000 0x0 0x18400000 0x0 0x00008000>,
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<0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;
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gmac0: ethernet@3,0 {
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reg = <0x1800 0x0 0x0 0x0 0x0>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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status = "disabled";
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};
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gmac1: ethernet@3,1 {
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reg = <0x1900 0x0 0x0 0x0 0x0>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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status = "disabled";
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};
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gmac2: ethernet@3,2 {
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reg = <0x1a00 0x0 0x0 0x0 0x0>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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status = "disabled";
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};
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xhci0: usb@4,0 {
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reg = <0x2000 0x0 0x0 0x0 0x0>;
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interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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status = "disabled";
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};
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xhci1: usb@19,0 {
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reg = <0xc800 0x0 0x0 0x0 0x0>;
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interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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status = "disabled";
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};
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display@6,1 {
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reg = <0x3100 0x0 0x0 0x0 0x0>;
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interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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status = "disabled";
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};
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hda@7,0 {
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reg = <0x3800 0x0 0x0 0x0 0x0>;
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interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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status = "disabled";
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};
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sata: sata@8,0 {
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reg = <0x4000 0x0 0x0 0x0 0x0>;
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pic>;
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status = "disabled";
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};
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pcie@9,0 {
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reg = <0x4800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
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ranges;
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};
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pcie@a,0 {
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reg = <0x5000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
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ranges;
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};
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pcie@b,0 {
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reg = <0x5800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
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ranges;
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};
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pcie@c,0 {
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reg = <0x6000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
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ranges;
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};
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pcie@d,0 {
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reg = <0x6800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
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ranges;
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};
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pcie@e,0 {
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reg = <0x7000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
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ranges;
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};
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pcie@f,0 {
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reg = <0x7800 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
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ranges;
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};
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pcie@10,0 {
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reg = <0x8000 0x0 0x0 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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interrupt-parent = <&pic>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0x0 0x0 0x0 0x0>;
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interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>;
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ranges;
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};
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};
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};
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};

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