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dt-bindings: display/msm: add missing device nodes to mdss-* schemas
Add missing device nodes (DSI, PHYs, DP/eDP) to the existing MDSS schemas. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/508391/ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]>
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‎Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml

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Original file line numberDiff line numberDiff line change
@@ -43,11 +43,24 @@ patternProperties:
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compatible:
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const: qcom,msm8998-dpu
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"^dsi@[0-9a-f]+$":
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type: object
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properties:
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compatible:
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const: qcom,mdss-dsi-ctrl
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"^phy@[0-9a-f]+$":
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type: object
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properties:
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compatible:
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const: qcom,dsi-phy-10nm-8998
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,mmcc-msm8998.h>
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#include <dt-bindings/clock/qcom,rpmcc.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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@@ -111,5 +124,145 @@ examples:
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};
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};
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};
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dsi@c994000 {
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compatible = "qcom,mdss-dsi-ctrl";
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reg = <0x0c994000 0x400>;
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reg-names = "dsi_ctrl";
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interrupt-parent = <&mdss>;
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interrupts = <4>;
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clocks = <&mmcc MDSS_BYTE0_CLK>,
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<&mmcc MDSS_BYTE0_INTF_CLK>,
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<&mmcc MDSS_PCLK0_CLK>,
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<&mmcc MDSS_ESC0_CLK>,
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<&mmcc MDSS_AHB_CLK>,
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<&mmcc MDSS_AXI_CLK>;
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clock-names = "byte",
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"byte_intf",
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"pixel",
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"core",
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"iface",
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"bus";
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assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
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assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
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operating-points-v2 = <&dsi_opp_table>;
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power-domains = <&rpmpd MSM8998_VDDCX>;
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phys = <&dsi0_phy>;
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phy-names = "dsi";
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi0_in: endpoint {
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remote-endpoint = <&dpu_intf1_out>;
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};
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};
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port@1 {
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reg = <1>;
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dsi0_out: endpoint {
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};
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};
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};
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};
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dsi0_phy: phy@c994400 {
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compatible = "qcom,dsi-phy-10nm-8998";
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reg = <0x0c994400 0x200>,
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<0x0c994600 0x280>,
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<0x0c994a00 0x1e0>;
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reg-names = "dsi_phy",
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"dsi_phy_lane",
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"dsi_pll";
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#clock-cells = <1>;
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#phy-cells = <0>;
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clocks = <&mmcc MDSS_AHB_CLK>,
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<&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "iface", "ref";
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vdds-supply = <&pm8998_l1>;
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};
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dsi@c996000 {
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compatible = "qcom,mdss-dsi-ctrl";
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reg = <0x0c996000 0x400>;
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reg-names = "dsi_ctrl";
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interrupt-parent = <&mdss>;
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interrupts = <5>;
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clocks = <&mmcc MDSS_BYTE1_CLK>,
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<&mmcc MDSS_BYTE1_INTF_CLK>,
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<&mmcc MDSS_PCLK1_CLK>,
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<&mmcc MDSS_ESC1_CLK>,
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<&mmcc MDSS_AHB_CLK>,
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<&mmcc MDSS_AXI_CLK>;
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clock-names = "byte",
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"byte_intf",
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"pixel",
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"core",
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"iface",
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"bus";
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assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
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assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
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operating-points-v2 = <&dsi_opp_table>;
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power-domains = <&rpmpd MSM8998_VDDCX>;
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phys = <&dsi1_phy>;
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phy-names = "dsi";
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi1_in: endpoint {
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remote-endpoint = <&dpu_intf2_out>;
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};
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};
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port@1 {
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reg = <1>;
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dsi1_out: endpoint {
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};
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};
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};
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};
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dsi1_phy: phy@c996400 {
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compatible = "qcom,dsi-phy-10nm-8998";
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reg = <0x0c996400 0x200>,
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<0x0c996600 0x280>,
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<0x0c996a00 0x10e>;
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reg-names = "dsi_phy",
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"dsi_phy_lane",
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"dsi_pll";
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#clock-cells = <1>;
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#phy-cells = <0>;
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clocks = <&mmcc MDSS_AHB_CLK>,
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<&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "iface", "ref";
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vdds-supply = <&pm8998_l1>;
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};
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};
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...

‎Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,12 +49,25 @@ patternProperties:
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compatible:
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const: qcom,qcm2290-dpu
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"^dsi@[0-9a-f]+$":
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type: object
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properties:
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compatible:
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const: qcom,dsi-ctrl-6g-qcm2290
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"^phy@[0-9a-f]+$":
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type: object
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properties:
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compatible:
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const: qcom,dsi-phy-14nm-2290
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
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#include <dt-bindings/clock/qcom,gcc-qcm2290.h>
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#include <dt-bindings/clock/qcom,rpmcc.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interconnect/qcom,qcm2290.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
@@ -113,5 +126,73 @@ examples:
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};
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};
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};
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dsi@5e94000 {
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compatible = "qcom,dsi-ctrl-6g-qcm2290";
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reg = <0x05e94000 0x400>;
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reg-names = "dsi_ctrl";
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interrupt-parent = <&mdss>;
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interrupts = <4>;
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clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
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<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
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<&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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<&dispcc DISP_CC_MDSS_ESC0_CLK>,
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<&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&gcc GCC_DISP_HF_AXI_CLK>;
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clock-names = "byte",
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"byte_intf",
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"pixel",
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"core",
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"iface",
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"bus";
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assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
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assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
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operating-points-v2 = <&dsi_opp_table>;
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power-domains = <&rpmpd QCM2290_VDDCX>;
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phys = <&dsi0_phy>;
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phy-names = "dsi";
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi0_in: endpoint {
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remote-endpoint = <&dpu_intf1_out>;
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};
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};
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port@1 {
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reg = <1>;
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dsi0_out: endpoint {
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};
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};
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};
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};
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dsi0_phy: phy@5e94400 {
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compatible = "qcom,dsi-phy-14nm-2290";
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reg = <0x05e94400 0x100>,
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<0x05e94500 0x300>,
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<0x05e94800 0x188>;
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reg-names = "dsi_phy",
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"dsi_phy_lane",
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"dsi_pll";
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#clock-cells = <1>;
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#phy-cells = <0>;
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clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "iface", "ref";
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vcca-supply = <&vreg_dsi_phy>;
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};
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};
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...

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