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huangruialexdeucher
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drm/amdgpu: remove re-route ih in psp v12
APU doesn't have second IH ring, so re-routing action here is a no-op. It will take a lot of time to wait timeout from PSP during the initialization. So remove the function in psp v12. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

Lines changed: 0 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -34,9 +34,6 @@
3434
#include "sdma0/sdma0_4_0_offset.h"
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#include "nbio/nbio_7_4_offset.h"
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37-
#include "oss/osssys_4_0_offset.h"
38-
#include "oss/osssys_4_0_sh_mask.h"
39-
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MODULE_FIRMWARE("amdgpu/renoir_asd.bin");
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MODULE_FIRMWARE("amdgpu/renoir_ta.bin");
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MODULE_FIRMWARE("amdgpu/green_sardine_asd.bin");
@@ -142,35 +139,6 @@ static int psp_v12_0_bootloader_load_sos(struct psp_context *psp)
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return ret;
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}
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145-
static void psp_v12_0_reroute_ih(struct psp_context *psp)
146-
{
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struct amdgpu_device *adev = psp->adev;
148-
uint32_t tmp;
149-
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/* Change IH ring for VMC */
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tmp = REG_SET_FIELD(0, IH_CLIENT_CFG_DATA, CREDIT_RETURN_ADDR, 0x1244b);
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tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, CLIENT_TYPE, 1);
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tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, RING_ID, 1);
154-
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3);
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp);
157-
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);
158-
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psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
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0x80000000, 0x8000FFFF, false);
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/* Change IH ring for UMC */
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tmp = REG_SET_FIELD(0, IH_CLIENT_CFG_DATA, CREDIT_RETURN_ADDR, 0x1216b);
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tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, RING_ID, 1);
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4);
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp);
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WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);
169-
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psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
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0x80000000, 0x8000FFFF, false);
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}
173-
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static int psp_v12_0_ring_create(struct psp_context *psp,
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enum psp_ring_type ring_type)
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{
@@ -179,8 +147,6 @@ static int psp_v12_0_ring_create(struct psp_context *psp,
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struct psp_ring *ring = &psp->km_ring;
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struct amdgpu_device *adev = psp->adev;
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182-
psp_v12_0_reroute_ih(psp);
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if (amdgpu_sriov_vf(psp->adev)) {
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/* Write low address of the ring to C2PMSG_102 */
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psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);

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