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Merge tag 'drm-intel-fixes-2020-03-05' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes
drm/i915 fixes for v5.6-rc5: - Break up long lists of object reclaim with cond_resched() - PSR probe fix - TGL workarounds - Selftest return value fix - Drop timeline mutex while waiting for retirement - Wait for OA configuration completion before writes to OA buffer Signed-off-by: Dave Airlie <[email protected]> From: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 26398db + 169c0aa commit 64c3fd5

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13 files changed

+142
-57
lines changed

13 files changed

+142
-57
lines changed

‎drivers/gpu/drm/i915/display/intel_display_power.c

Lines changed: 24 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4466,13 +4466,19 @@ static void icl_dbuf_disable(struct drm_i915_private *dev_priv)
44664466

44674467
static void icl_mbus_init(struct drm_i915_private *dev_priv)
44684468
{
4469-
u32 val;
4469+
u32 mask, val;
44704470

4471-
val = MBUS_ABOX_BT_CREDIT_POOL1(16) |
4472-
MBUS_ABOX_BT_CREDIT_POOL2(16) |
4473-
MBUS_ABOX_B_CREDIT(1) |
4474-
MBUS_ABOX_BW_CREDIT(1);
4471+
mask = MBUS_ABOX_BT_CREDIT_POOL1_MASK |
4472+
MBUS_ABOX_BT_CREDIT_POOL2_MASK |
4473+
MBUS_ABOX_B_CREDIT_MASK |
4474+
MBUS_ABOX_BW_CREDIT_MASK;
44754475

4476+
val = I915_READ(MBUS_ABOX_CTL);
4477+
val &= ~mask;
4478+
val |= MBUS_ABOX_BT_CREDIT_POOL1(16) |
4479+
MBUS_ABOX_BT_CREDIT_POOL2(16) |
4480+
MBUS_ABOX_B_CREDIT(1) |
4481+
MBUS_ABOX_BW_CREDIT(1);
44764482
I915_WRITE(MBUS_ABOX_CTL, val);
44774483
}
44784484

@@ -4968,8 +4974,21 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
49684974
I915_WRITE(BW_BUDDY1_CTL, BW_BUDDY_DISABLE);
49694975
I915_WRITE(BW_BUDDY2_CTL, BW_BUDDY_DISABLE);
49704976
} else {
4977+
u32 val;
4978+
49714979
I915_WRITE(BW_BUDDY1_PAGE_MASK, table[i].page_mask);
49724980
I915_WRITE(BW_BUDDY2_PAGE_MASK, table[i].page_mask);
4981+
4982+
/* Wa_22010178259:tgl */
4983+
val = I915_READ(BW_BUDDY1_CTL);
4984+
val &= ~BW_BUDDY_TLB_REQ_TIMER_MASK;
4985+
val |= REG_FIELD_PREP(BW_BUDDY_TLB_REQ_TIMER_MASK, 0x8);
4986+
I915_WRITE(BW_BUDDY1_CTL, val);
4987+
4988+
val = I915_READ(BW_BUDDY2_CTL);
4989+
val &= ~BW_BUDDY_TLB_REQ_TIMER_MASK;
4990+
val |= REG_FIELD_PREP(BW_BUDDY_TLB_REQ_TIMER_MASK, 0x8);
4991+
I915_WRITE(BW_BUDDY2_CTL, val);
49734992
}
49744993
}
49754994

‎drivers/gpu/drm/i915/display/intel_psr.c

Lines changed: 21 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -852,10 +852,12 @@ void intel_psr_enable(struct intel_dp *intel_dp,
852852
{
853853
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
854854

855-
if (!crtc_state->has_psr)
855+
if (!CAN_PSR(dev_priv) || dev_priv->psr.dp != intel_dp)
856856
return;
857857

858-
if (WARN_ON(!CAN_PSR(dev_priv)))
858+
dev_priv->psr.force_mode_changed = false;
859+
860+
if (!crtc_state->has_psr)
859861
return;
860862

861863
WARN_ON(dev_priv->drrs.dp);
@@ -1009,6 +1011,8 @@ void intel_psr_update(struct intel_dp *intel_dp,
10091011
if (!CAN_PSR(dev_priv) || READ_ONCE(psr->dp) != intel_dp)
10101012
return;
10111013

1014+
dev_priv->psr.force_mode_changed = false;
1015+
10121016
mutex_lock(&dev_priv->psr.lock);
10131017

10141018
enable = crtc_state->has_psr && psr_global_enabled(psr->debug);
@@ -1534,7 +1538,7 @@ void intel_psr_atomic_check(struct drm_connector *connector,
15341538
struct drm_crtc_state *crtc_state;
15351539

15361540
if (!CAN_PSR(dev_priv) || !new_state->crtc ||
1537-
dev_priv->psr.initially_probed)
1541+
!dev_priv->psr.force_mode_changed)
15381542
return;
15391543

15401544
intel_connector = to_intel_connector(connector);
@@ -1545,5 +1549,18 @@ void intel_psr_atomic_check(struct drm_connector *connector,
15451549
crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
15461550
new_state->crtc);
15471551
crtc_state->mode_changed = true;
1548-
dev_priv->psr.initially_probed = true;
1552+
}
1553+
1554+
void intel_psr_set_force_mode_changed(struct intel_dp *intel_dp)
1555+
{
1556+
struct drm_i915_private *dev_priv;
1557+
1558+
if (!intel_dp)
1559+
return;
1560+
1561+
dev_priv = dp_to_i915(intel_dp);
1562+
if (!CAN_PSR(dev_priv) || intel_dp != dev_priv->psr.dp)
1563+
return;
1564+
1565+
dev_priv->psr.force_mode_changed = true;
15491566
}

‎drivers/gpu/drm/i915/display/intel_psr.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,5 +40,6 @@ bool intel_psr_enabled(struct intel_dp *intel_dp);
4040
void intel_psr_atomic_check(struct drm_connector *connector,
4141
struct drm_connector_state *old_state,
4242
struct drm_connector_state *new_state);
43+
void intel_psr_set_force_mode_changed(struct intel_dp *intel_dp);
4344

4445
#endif /* __INTEL_PSR_H__ */

‎drivers/gpu/drm/i915/gem/i915_gem_object.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -225,6 +225,7 @@ static void __i915_gem_free_objects(struct drm_i915_private *i915,
225225

226226
/* But keep the pointer alive for RCU-protected lookups */
227227
call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
228+
cond_resched();
228229
}
229230
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
230231
}

‎drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -570,7 +570,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
570570

571571
obj = i915_gem_object_create_internal(i915, size);
572572
if (IS_ERR(obj))
573-
return PTR_ERR(obj);
573+
return false;
574574

575575
mmo = mmap_offset_attach(obj, I915_MMAP_OFFSET_GTT, NULL);
576576
i915_gem_object_put(obj);

‎drivers/gpu/drm/i915/gt/intel_gt_requests.c

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -147,24 +147,32 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt, long timeout)
147147

148148
fence = i915_active_fence_get(&tl->last_request);
149149
if (fence) {
150+
mutex_unlock(&tl->mutex);
151+
150152
timeout = dma_fence_wait_timeout(fence,
151153
interruptible,
152154
timeout);
153155
dma_fence_put(fence);
156+
157+
/* Retirement is best effort */
158+
if (!mutex_trylock(&tl->mutex)) {
159+
active_count++;
160+
goto out_active;
161+
}
154162
}
155163
}
156164

157165
if (!retire_requests(tl) || flush_submission(gt))
158166
active_count++;
167+
mutex_unlock(&tl->mutex);
159168

160-
spin_lock(&timelines->lock);
169+
out_active: spin_lock(&timelines->lock);
161170

162-
/* Resume iteration after dropping lock */
171+
/* Resume list iteration after reacquiring spinlock */
163172
list_safe_reset_next(tl, tn, link);
164173
if (atomic_dec_and_test(&tl->active_count))
165174
list_del(&tl->link);
166175

167-
mutex_unlock(&tl->mutex);
168176

169177
/* Defer the final release to after the spinlock */
170178
if (refcount_dec_and_test(&tl->kref.refcount)) {

‎drivers/gpu/drm/i915/gt/intel_workarounds.c

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -575,24 +575,19 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine,
575575
static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine,
576576
struct i915_wa_list *wal)
577577
{
578-
u32 val;
579-
580578
/* Wa_1409142259:tgl */
581579
WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3,
582580
GEN12_DISABLE_CPS_AWARE_COLOR_PIPE);
583581

584-
/* Wa_1604555607:tgl */
585-
val = intel_uncore_read(engine->uncore, FF_MODE2);
586-
val &= ~FF_MODE2_TDS_TIMER_MASK;
587-
val |= FF_MODE2_TDS_TIMER_128;
588582
/*
589-
* FIXME: FF_MODE2 register is not readable till TGL B0. We can
590-
* enable verification of WA from the later steppings, which enables
591-
* the read of FF_MODE2.
583+
* Wa_1604555607:gen12 and Wa_1608008084:gen12
584+
* FF_MODE2 register will return the wrong value when read. The default
585+
* value for this register is zero for all fields and there are no bit
586+
* masks. So instead of doing a RMW we should just write the TDS timer
587+
* value for Wa_1604555607.
592588
*/
593-
wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
594-
IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 :
595-
FF_MODE2_TDS_TIMER_MASK);
589+
wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK,
590+
FF_MODE2_TDS_TIMER_128, 0);
596591
}
597592

598593
static void

‎drivers/gpu/drm/i915/i915_drv.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@
5656
#include "display/intel_hotplug.h"
5757
#include "display/intel_overlay.h"
5858
#include "display/intel_pipe_crc.h"
59+
#include "display/intel_psr.h"
5960
#include "display/intel_sprite.h"
6061
#include "display/intel_vga.h"
6162

@@ -330,6 +331,8 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
330331

331332
intel_init_ipc(i915);
332333

334+
intel_psr_set_force_mode_changed(i915->psr.dp);
335+
333336
return 0;
334337

335338
cleanup_gem:

‎drivers/gpu/drm/i915/i915_drv.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -505,7 +505,7 @@ struct i915_psr {
505505
bool dc3co_enabled;
506506
u32 dc3co_exit_delay;
507507
struct delayed_work idle_work;
508-
bool initially_probed;
508+
bool force_mode_changed;
509509
};
510510

511511
#define QUIRK_LVDS_SSC_DISABLE (1<<1)

‎drivers/gpu/drm/i915/i915_perf.c

Lines changed: 41 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1954,17 +1954,18 @@ get_oa_vma(struct i915_perf_stream *stream, struct i915_oa_config *oa_config)
19541954
return i915_vma_get(oa_bo->vma);
19551955
}
19561956

1957-
static int emit_oa_config(struct i915_perf_stream *stream,
1958-
struct i915_oa_config *oa_config,
1959-
struct intel_context *ce)
1957+
static struct i915_request *
1958+
emit_oa_config(struct i915_perf_stream *stream,
1959+
struct i915_oa_config *oa_config,
1960+
struct intel_context *ce)
19601961
{
19611962
struct i915_request *rq;
19621963
struct i915_vma *vma;
19631964
int err;
19641965

19651966
vma = get_oa_vma(stream, oa_config);
19661967
if (IS_ERR(vma))
1967-
return PTR_ERR(vma);
1968+
return ERR_CAST(vma);
19681969

19691970
err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL | PIN_HIGH);
19701971
if (err)
@@ -1989,21 +1990,26 @@ static int emit_oa_config(struct i915_perf_stream *stream,
19891990
err = rq->engine->emit_bb_start(rq,
19901991
vma->node.start, 0,
19911992
I915_DISPATCH_SECURE);
1993+
if (err)
1994+
goto err_add_request;
1995+
1996+
i915_request_get(rq);
19921997
err_add_request:
19931998
i915_request_add(rq);
19941999
err_vma_unpin:
19952000
i915_vma_unpin(vma);
19962001
err_vma_put:
19972002
i915_vma_put(vma);
1998-
return err;
2003+
return err ? ERR_PTR(err) : rq;
19992004
}
20002005

20012006
static struct intel_context *oa_context(struct i915_perf_stream *stream)
20022007
{
20032008
return stream->pinned_ctx ?: stream->engine->kernel_context;
20042009
}
20052010

2006-
static int hsw_enable_metric_set(struct i915_perf_stream *stream)
2011+
static struct i915_request *
2012+
hsw_enable_metric_set(struct i915_perf_stream *stream)
20072013
{
20082014
struct intel_uncore *uncore = stream->uncore;
20092015

@@ -2406,7 +2412,8 @@ static int lrc_configure_all_contexts(struct i915_perf_stream *stream,
24062412
return oa_configure_all_contexts(stream, regs, ARRAY_SIZE(regs));
24072413
}
24082414

2409-
static int gen8_enable_metric_set(struct i915_perf_stream *stream)
2415+
static struct i915_request *
2416+
gen8_enable_metric_set(struct i915_perf_stream *stream)
24102417
{
24112418
struct intel_uncore *uncore = stream->uncore;
24122419
struct i915_oa_config *oa_config = stream->oa_config;
@@ -2448,7 +2455,7 @@ static int gen8_enable_metric_set(struct i915_perf_stream *stream)
24482455
*/
24492456
ret = lrc_configure_all_contexts(stream, oa_config);
24502457
if (ret)
2451-
return ret;
2458+
return ERR_PTR(ret);
24522459

24532460
return emit_oa_config(stream, oa_config, oa_context(stream));
24542461
}
@@ -2460,7 +2467,8 @@ static u32 oag_report_ctx_switches(const struct i915_perf_stream *stream)
24602467
0 : GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS);
24612468
}
24622469

2463-
static int gen12_enable_metric_set(struct i915_perf_stream *stream)
2470+
static struct i915_request *
2471+
gen12_enable_metric_set(struct i915_perf_stream *stream)
24642472
{
24652473
struct intel_uncore *uncore = stream->uncore;
24662474
struct i915_oa_config *oa_config = stream->oa_config;
@@ -2491,7 +2499,7 @@ static int gen12_enable_metric_set(struct i915_perf_stream *stream)
24912499
*/
24922500
ret = gen12_configure_all_contexts(stream, oa_config);
24932501
if (ret)
2494-
return ret;
2502+
return ERR_PTR(ret);
24952503

24962504
/*
24972505
* For Gen12, performance counters are context
@@ -2501,7 +2509,7 @@ static int gen12_enable_metric_set(struct i915_perf_stream *stream)
25012509
if (stream->ctx) {
25022510
ret = gen12_configure_oar_context(stream, true);
25032511
if (ret)
2504-
return ret;
2512+
return ERR_PTR(ret);
25052513
}
25062514

25072515
return emit_oa_config(stream, oa_config, oa_context(stream));
@@ -2696,6 +2704,20 @@ static const struct i915_perf_stream_ops i915_oa_stream_ops = {
26962704
.read = i915_oa_read,
26972705
};
26982706

2707+
static int i915_perf_stream_enable_sync(struct i915_perf_stream *stream)
2708+
{
2709+
struct i915_request *rq;
2710+
2711+
rq = stream->perf->ops.enable_metric_set(stream);
2712+
if (IS_ERR(rq))
2713+
return PTR_ERR(rq);
2714+
2715+
i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT);
2716+
i915_request_put(rq);
2717+
2718+
return 0;
2719+
}
2720+
26992721
/**
27002722
* i915_oa_stream_init - validate combined props for OA stream and init
27012723
* @stream: An i915 perf stream
@@ -2829,7 +2851,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
28292851
stream->ops = &i915_oa_stream_ops;
28302852
perf->exclusive_stream = stream;
28312853

2832-
ret = perf->ops.enable_metric_set(stream);
2854+
ret = i915_perf_stream_enable_sync(stream);
28332855
if (ret) {
28342856
DRM_DEBUG("Unable to enable metric set\n");
28352857
goto err_enable;
@@ -3147,7 +3169,7 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream,
31473169
return -EINVAL;
31483170

31493171
if (config != stream->oa_config) {
3150-
int err;
3172+
struct i915_request *rq;
31513173

31523174
/*
31533175
* If OA is bound to a specific context, emit the
@@ -3158,11 +3180,13 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream,
31583180
* When set globally, we use a low priority kernel context,
31593181
* so it will effectively take effect when idle.
31603182
*/
3161-
err = emit_oa_config(stream, config, oa_context(stream));
3162-
if (err == 0)
3183+
rq = emit_oa_config(stream, config, oa_context(stream));
3184+
if (!IS_ERR(rq)) {
31633185
config = xchg(&stream->oa_config, config);
3164-
else
3165-
ret = err;
3186+
i915_request_put(rq);
3187+
} else {
3188+
ret = PTR_ERR(rq);
3189+
}
31663190
}
31673191

31683192
i915_oa_config_put(config);

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