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drm/i915/dp: Correctly advertise HBR3 for GEN11+
intel_dp_set_source_rates() calls intel_dp_is_edp(), which is unsafe to use before encoder_type is set. This caused GEN11+ to incorrectly strip HBR3 from source rates for edp. Move intel_dp_set_source_rates() to after encoder_type is set. Add comment to intel_dp_is_edp() describing unsafe usages. v2: Alter intel_dp_set_source_rates final position (Ville/Manasi). Remove outdated comment (Ville). Slight optimization of control flow in intel_dp_init_connector. Slight rewording in commit message. Signed-off-by: Matt Atwood <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/i915/display/intel_dp.c

Lines changed: 11 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -137,6 +137,8 @@ static const u8 valid_dsc_slicecount[] = {1, 2, 4};
137137
*
138138
* If a CPU or PCH DP output is attached to an eDP panel, this function
139139
* will return true, and false otherwise.
140+
*
141+
* This function is not safe to use prior to encoder type being set.
140142
*/
141143
bool intel_dp_is_edp(struct intel_dp *intel_dp)
142144
{
@@ -8157,8 +8159,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
81578159
intel_encoder->base.name))
81588160
return false;
81598161

8160-
intel_dp_set_source_rates(intel_dp);
8161-
81628162
intel_dp->reset_link_params = true;
81638163
intel_dp->pps_pipe = INVALID_PIPE;
81648164
intel_dp->active_pipe = INVALID_PIPE;
@@ -8174,28 +8174,22 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
81748174
*/
81758175
drm_WARN_ON(dev, intel_phy_is_tc(dev_priv, phy));
81768176
type = DRM_MODE_CONNECTOR_eDP;
8177+
intel_encoder->type = INTEL_OUTPUT_EDP;
8178+
8179+
/* eDP only on port B and/or C on vlv/chv */
8180+
if (drm_WARN_ON(dev, (IS_VALLEYVIEW(dev_priv) ||
8181+
IS_CHERRYVIEW(dev_priv)) &&
8182+
port != PORT_B && port != PORT_C))
8183+
return false;
81778184
} else {
81788185
type = DRM_MODE_CONNECTOR_DisplayPort;
81798186
}
81808187

8188+
intel_dp_set_source_rates(intel_dp);
8189+
81818190
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
81828191
intel_dp->active_pipe = vlv_active_pipe(intel_dp);
81838192

8184-
/*
8185-
* For eDP we always set the encoder type to INTEL_OUTPUT_EDP, but
8186-
* for DP the encoder type can be set by the caller to
8187-
* INTEL_OUTPUT_UNKNOWN for DDI, so don't rewrite it.
8188-
*/
8189-
if (type == DRM_MODE_CONNECTOR_eDP)
8190-
intel_encoder->type = INTEL_OUTPUT_EDP;
8191-
8192-
/* eDP only on port B and/or C on vlv/chv */
8193-
if (drm_WARN_ON(dev, (IS_VALLEYVIEW(dev_priv) ||
8194-
IS_CHERRYVIEW(dev_priv)) &&
8195-
intel_dp_is_edp(intel_dp) &&
8196-
port != PORT_B && port != PORT_C))
8197-
return false;
8198-
81998193
drm_dbg_kms(&dev_priv->drm,
82008194
"Adding %s connector on [ENCODER:%d:%s]\n",
82018195
type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",

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