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airliedairlied
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Merge tag 'drm-msm-next-2024-04-11' of https://gitlab.freedesktop.org/drm/msm into drm-fixes
Fixes for v6.9 Display: - Fixes for PM refcount leak when DP goes to disconnected state and also when link training fails. This is also one of the issues found with the pm runtime series - Add missing newlines to prints in msm_fb and msm_kms - Change permissions of some dpu debugfs entries which write to const data from catalog to read-only to avoid protection faults - Fix the interface table for the catalog of X1E80100. This is an important fix to bringup DP for X1E80100. - Logging fix to print the callback symbol in the invalid IRQ message case rather than printing when its known to be NULL. - Bindings fix to add DP node as child of mdss for mdss node - Minor typo fix in DP driver API which handles port status change GPU: - fix CHRASHDUMP_READ() - fix HHB (highest bank bit) for a619 to fix UBWC corruption Signed-off-by: Dave Airlie <[email protected]> From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvFwRUcHGWva7oDeydq1PTiZMduuykCD2MWaFrT4iMGZA@mail.gmail.com
2 parents 1bafeaf + 9dc23cb commit 6d83727

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9 files changed

+63
-20
lines changed

9 files changed

+63
-20
lines changed

‎Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -53,6 +53,15 @@ patternProperties:
5353
compatible:
5454
const: qcom,sm8150-dpu
5555

56+
"^displayport-controller@[0-9a-f]+$":
57+
type: object
58+
additionalProperties: true
59+
60+
properties:
61+
compatible:
62+
contains:
63+
const: qcom,sm8150-dp
64+
5665
"^dsi@[0-9a-f]+$":
5766
type: object
5867
additionalProperties: true

‎drivers/gpu/drm/msm/adreno/a6xx_gpu.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1377,6 +1377,10 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu)
13771377
if (adreno_is_a618(gpu))
13781378
gpu->ubwc_config.highest_bank_bit = 14;
13791379

1380+
if (adreno_is_a619(gpu))
1381+
/* TODO: Should be 14 but causes corruption at e.g. 1920x1200 on DP */
1382+
gpu->ubwc_config.highest_bank_bit = 13;
1383+
13801384
if (adreno_is_a619_holi(gpu))
13811385
gpu->ubwc_config.highest_bank_bit = 13;
13821386

‎drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -852,7 +852,7 @@ static void a6xx_get_shader_block(struct msm_gpu *gpu,
852852
(block->type << 8) | i);
853853

854854
in += CRASHDUMP_READ(in, REG_A6XX_HLSQ_DBG_AHB_READ_APERTURE,
855-
block->size, dumper->iova + A6XX_CD_DATA_OFFSET);
855+
block->size, out);
856856

857857
out += block->size * sizeof(u32);
858858
}

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h

Lines changed: 31 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -324,6 +324,7 @@ static const struct dpu_wb_cfg x1e80100_wb[] = {
324324
},
325325
};
326326

327+
/* TODO: INTF 3, 8 and 7 are used for MST, marked as INTF_NONE for now */
327328
static const struct dpu_intf_cfg x1e80100_intf[] = {
328329
{
329330
.name = "intf_0", .id = INTF_0,
@@ -358,8 +359,8 @@ static const struct dpu_intf_cfg x1e80100_intf[] = {
358359
.name = "intf_3", .id = INTF_3,
359360
.base = 0x37000, .len = 0x280,
360361
.features = INTF_SC7280_MASK,
361-
.type = INTF_DP,
362-
.controller_id = MSM_DP_CONTROLLER_1,
362+
.type = INTF_NONE,
363+
.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
363364
.prog_fetch_lines_worst_case = 24,
364365
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 30),
365366
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 31),
@@ -368,7 +369,7 @@ static const struct dpu_intf_cfg x1e80100_intf[] = {
368369
.base = 0x38000, .len = 0x280,
369370
.features = INTF_SC7280_MASK,
370371
.type = INTF_DP,
371-
.controller_id = MSM_DP_CONTROLLER_2,
372+
.controller_id = MSM_DP_CONTROLLER_1,
372373
.prog_fetch_lines_worst_case = 24,
373374
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 20),
374375
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 21),
@@ -381,6 +382,33 @@ static const struct dpu_intf_cfg x1e80100_intf[] = {
381382
.prog_fetch_lines_worst_case = 24,
382383
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 22),
383384
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 23),
385+
}, {
386+
.name = "intf_6", .id = INTF_6,
387+
.base = 0x3A000, .len = 0x280,
388+
.features = INTF_SC7280_MASK,
389+
.type = INTF_DP,
390+
.controller_id = MSM_DP_CONTROLLER_2,
391+
.prog_fetch_lines_worst_case = 24,
392+
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17),
393+
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16),
394+
}, {
395+
.name = "intf_7", .id = INTF_7,
396+
.base = 0x3b000, .len = 0x280,
397+
.features = INTF_SC7280_MASK,
398+
.type = INTF_NONE,
399+
.controller_id = MSM_DP_CONTROLLER_2, /* pair with intf_6 for DP MST */
400+
.prog_fetch_lines_worst_case = 24,
401+
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 18),
402+
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 19),
403+
}, {
404+
.name = "intf_8", .id = INTF_8,
405+
.base = 0x3c000, .len = 0x280,
406+
.features = INTF_SC7280_MASK,
407+
.type = INTF_NONE,
408+
.controller_id = MSM_DP_CONTROLLER_1, /* pair with intf_4 for DP MST */
409+
.prog_fetch_lines_worst_case = 24,
410+
.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12),
411+
.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13),
384412
},
385413
};
386414

‎drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -459,15 +459,15 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent)
459459
&perf->core_clk_rate);
460460
debugfs_create_u32("enable_bw_release", 0600, entry,
461461
(u32 *)&perf->enable_bw_release);
462-
debugfs_create_u32("threshold_low", 0600, entry,
462+
debugfs_create_u32("threshold_low", 0400, entry,
463463
(u32 *)&perf->perf_cfg->max_bw_low);
464-
debugfs_create_u32("threshold_high", 0600, entry,
464+
debugfs_create_u32("threshold_high", 0400, entry,
465465
(u32 *)&perf->perf_cfg->max_bw_high);
466-
debugfs_create_u32("min_core_ib", 0600, entry,
466+
debugfs_create_u32("min_core_ib", 0400, entry,
467467
(u32 *)&perf->perf_cfg->min_core_ib);
468-
debugfs_create_u32("min_llcc_ib", 0600, entry,
468+
debugfs_create_u32("min_llcc_ib", 0400, entry,
469469
(u32 *)&perf->perf_cfg->min_llcc_ib);
470-
debugfs_create_u32("min_dram_ib", 0600, entry,
470+
debugfs_create_u32("min_dram_ib", 0400, entry,
471471
(u32 *)&perf->perf_cfg->min_dram_ib);
472472
debugfs_create_file("perf_mode", 0600, entry,
473473
(u32 *)perf, &dpu_core_perf_mode_fops);

‎drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -525,14 +525,14 @@ int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms,
525525
int ret;
526526

527527
if (!irq_cb) {
528-
DPU_ERROR("invalid IRQ=[%d, %d] irq_cb:%ps\n",
529-
DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx), irq_cb);
528+
DPU_ERROR("IRQ=[%d, %d] NULL callback\n",
529+
DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx));
530530
return -EINVAL;
531531
}
532532

533533
if (!dpu_core_irq_is_valid(irq_idx)) {
534-
DPU_ERROR("invalid IRQ=[%d, %d]\n",
535-
DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx));
534+
DPU_ERROR("invalid IRQ=[%d, %d] irq_cb:%ps\n",
535+
DPU_IRQ_REG(irq_idx), DPU_IRQ_BIT(irq_idx), irq_cb);
536536
return -EINVAL;
537537
}
538538

‎drivers/gpu/drm/msm/dp/dp_display.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -484,7 +484,7 @@ static void dp_display_handle_video_request(struct dp_display_private *dp)
484484
}
485485
}
486486

487-
static int dp_display_handle_port_ststus_changed(struct dp_display_private *dp)
487+
static int dp_display_handle_port_status_changed(struct dp_display_private *dp)
488488
{
489489
int rc = 0;
490490

@@ -541,7 +541,7 @@ static int dp_display_usbpd_attention_cb(struct device *dev)
541541
drm_dbg_dp(dp->drm_dev, "hpd_state=%d sink_request=%d\n",
542542
dp->hpd_state, sink_request);
543543
if (sink_request & DS_PORT_STATUS_CHANGED)
544-
rc = dp_display_handle_port_ststus_changed(dp);
544+
rc = dp_display_handle_port_status_changed(dp);
545545
else
546546
rc = dp_display_handle_irq_hpd(dp);
547547
}
@@ -588,6 +588,7 @@ static int dp_hpd_plug_handle(struct dp_display_private *dp, u32 data)
588588
ret = dp_display_usbpd_configure_cb(&pdev->dev);
589589
if (ret) { /* link train failed */
590590
dp->hpd_state = ST_DISCONNECTED;
591+
pm_runtime_put_sync(&pdev->dev);
591592
} else {
592593
dp->hpd_state = ST_MAINLINK_READY;
593594
}
@@ -645,6 +646,7 @@ static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data)
645646
dp_display_host_phy_exit(dp);
646647
dp->hpd_state = ST_DISCONNECTED;
647648
dp_display_notify_disconnect(&dp->dp_display.pdev->dev);
649+
pm_runtime_put_sync(&pdev->dev);
648650
mutex_unlock(&dp->event_mutex);
649651
return 0;
650652
}

‎drivers/gpu/drm/msm/msm_fb.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ int msm_framebuffer_prepare(struct drm_framebuffer *fb,
8989

9090
for (i = 0; i < n; i++) {
9191
ret = msm_gem_get_and_pin_iova(fb->obj[i], aspace, &msm_fb->iova[i]);
92-
drm_dbg_state(fb->dev, "FB[%u]: iova[%d]: %08llx (%d)",
92+
drm_dbg_state(fb->dev, "FB[%u]: iova[%d]: %08llx (%d)\n",
9393
fb->base.id, i, msm_fb->iova[i], ret);
9494
if (ret)
9595
return ret;
@@ -176,7 +176,7 @@ static struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
176176
const struct msm_format *format;
177177
int ret, i, n;
178178

179-
drm_dbg_state(dev, "create framebuffer: mode_cmd=%p (%dx%d@%4.4s)",
179+
drm_dbg_state(dev, "create framebuffer: mode_cmd=%p (%dx%d@%4.4s)\n",
180180
mode_cmd, mode_cmd->width, mode_cmd->height,
181181
(char *)&mode_cmd->pixel_format);
182182

@@ -232,7 +232,7 @@ static struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
232232

233233
refcount_set(&msm_fb->dirtyfb, 1);
234234

235-
drm_dbg_state(dev, "create: FB ID: %d (%p)", fb->base.id, fb);
235+
drm_dbg_state(dev, "create: FB ID: %d (%p)\n", fb->base.id, fb);
236236

237237
return fb;
238238

‎drivers/gpu/drm/msm/msm_kms.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,7 @@ int msm_crtc_enable_vblank(struct drm_crtc *crtc)
149149
struct msm_kms *kms = priv->kms;
150150
if (!kms)
151151
return -ENXIO;
152-
drm_dbg_vbl(dev, "crtc=%u", crtc->base.id);
152+
drm_dbg_vbl(dev, "crtc=%u\n", crtc->base.id);
153153
return vblank_ctrl_queue_work(priv, crtc, true);
154154
}
155155

@@ -160,7 +160,7 @@ void msm_crtc_disable_vblank(struct drm_crtc *crtc)
160160
struct msm_kms *kms = priv->kms;
161161
if (!kms)
162162
return;
163-
drm_dbg_vbl(dev, "crtc=%u", crtc->base.id);
163+
drm_dbg_vbl(dev, "crtc=%u\n", crtc->base.id);
164164
vblank_ctrl_queue_work(priv, crtc, false);
165165
}
166166

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