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cxl: Add checks to access_coordinate calculation to fail missing data
Jonathan noted that when the coordinates for host bridge and switches can be 0s if no actual data are retrieved and the calculation continues. The resulting number would be inaccurate. Add checks to ensure that the calculation would complete only if the numbers are valid. While not seen in the wild, issue may show up with a BIOS that reported CXL root ports via Generic Ports (via a PCI handle in the SRAT entry). Fixes: 14a6960 ("cxl: Add helper function that calculate performance data for downstream ports") Reported-by: Jonathan Cameron <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Reviewed-by: Davidlohr Bueso <[email protected]> Reviewed-by: Dan Williams <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dave Jiang <[email protected]>
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drivers/cxl/core/port.c

Lines changed: 18 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2141,6 +2141,18 @@ static void add_latency(struct access_coordinate *c, long latency)
21412141
}
21422142
}
21432143

2144+
static bool coordinates_valid(struct access_coordinate *c)
2145+
{
2146+
for (int i = 0; i < ACCESS_COORDINATE_MAX; i++) {
2147+
if (c[i].read_bandwidth && c[i].write_bandwidth &&
2148+
c[i].read_latency && c[i].write_latency)
2149+
continue;
2150+
return false;
2151+
}
2152+
2153+
return true;
2154+
}
2155+
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static void set_min_bandwidth(struct access_coordinate *c, unsigned int bw)
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{
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for (int i = 0; i < ACCESS_COORDINATE_MAX; i++) {
@@ -2206,13 +2218,18 @@ int cxl_endpoint_get_perf_coordinates(struct cxl_port *port,
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* There's no valid access_coordinate for a root port since RPs do not
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* have CDAT and therefore needs to be skipped.
22082220
*/
2209-
if (!is_cxl_root)
2221+
if (!is_cxl_root) {
2222+
if (!coordinates_valid(dport->coord))
2223+
return -EINVAL;
22102224
cxl_coordinates_combine(c, c, dport->coord);
2225+
}
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add_latency(c, dport->link_latency);
22122227
} while (!is_cxl_root);
22132228

22142229
dport = iter->parent_dport;
22152230
/* Retrieve HB coords */
2231+
if (!coordinates_valid(dport->coord))
2232+
return -EINVAL;
22162233
cxl_coordinates_combine(c, c, dport->coord);
22172234

22182235
/* Get the calculated PCI paths bandwidth */

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