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Ben Widawskydjbw
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cxl/pci: Make more use of cxl_register_map
The structure exists to pass around information about register mapping. Use it for passing @Barno and @block_offset, and eliminate duplicate local variables. The helpers that use @Map do not care about @cxlm, so just pass them a pdev instead. [djbw: reorder before cxl_pci_setup_regs() refactor to improver readability] Signed-off-by: Ben Widawsky <[email protected]> Reported-by: kernel test robot <[email protected]> Reviewed-by: Ira Weiny <[email protected]> [djbw: separate @base conversion] Link: https://lore.kernel.org/r/163416901172.806743.10056306321247850914.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <[email protected]>
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drivers/cxl/pci.c

Lines changed: 25 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -306,17 +306,18 @@ static int cxl_pci_setup_mailbox(struct cxl_mem *cxlm)
306306
return 0;
307307
}
308308

309-
static void __iomem *cxl_pci_map_regblock(struct cxl_mem *cxlm,
310-
u8 bar, u64 offset)
309+
static void __iomem *cxl_pci_map_regblock(struct pci_dev *pdev,
310+
struct cxl_register_map *map)
311311
{
312312
void __iomem *addr;
313-
struct device *dev = cxlm->dev;
314-
struct pci_dev *pdev = to_pci_dev(dev);
313+
int bar = map->barno;
314+
struct device *dev = &pdev->dev;
315+
resource_size_t offset = map->block_offset;
315316

316317
/* Basic sanity check that BAR is big enough */
317318
if (pci_resource_len(pdev, bar) < offset) {
318-
dev_err(dev, "BAR%d: %pr: too small (offset: %#llx)\n", bar,
319-
&pdev->resource[bar], (unsigned long long)offset);
319+
dev_err(dev, "BAR%d: %pr: too small (offset: %pa)\n", bar,
320+
&pdev->resource[bar], &offset);
320321
return NULL;
321322
}
322323

@@ -326,15 +327,15 @@ static void __iomem *cxl_pci_map_regblock(struct cxl_mem *cxlm,
326327
return addr;
327328
}
328329

329-
dev_dbg(dev, "Mapped CXL Memory Device resource bar %u @ %#llx\n",
330-
bar, offset);
330+
dev_dbg(dev, "Mapped CXL Memory Device resource bar %u @ %pa\n",
331+
bar, &offset);
331332

332333
return addr;
333334
}
334335

335-
static void cxl_pci_unmap_regblock(struct cxl_mem *cxlm, void __iomem *base)
336+
static void cxl_pci_unmap_regblock(struct pci_dev *pdev, void __iomem *base)
336337
{
337-
pci_iounmap(to_pci_dev(cxlm->dev), base);
338+
pci_iounmap(pdev, base);
338339
}
339340

340341
static int cxl_pci_dvsec(struct pci_dev *pdev, int dvsec)
@@ -360,12 +361,12 @@ static int cxl_pci_dvsec(struct pci_dev *pdev, int dvsec)
360361
return 0;
361362
}
362363

363-
static int cxl_probe_regs(struct cxl_mem *cxlm, void __iomem *base,
364+
static int cxl_probe_regs(struct pci_dev *pdev, void __iomem *base,
364365
struct cxl_register_map *map)
365366
{
366367
struct cxl_component_reg_map *comp_map;
367368
struct cxl_device_reg_map *dev_map;
368-
struct device *dev = cxlm->dev;
369+
struct device *dev = &pdev->dev;
369370

370371
switch (map->reg_type) {
371372
case CXL_REGLOC_RBI_COMPONENT:
@@ -420,12 +421,13 @@ static int cxl_map_regs(struct cxl_mem *cxlm, struct cxl_register_map *map)
420421
return 0;
421422
}
422423

423-
static void cxl_decode_register_block(u32 reg_lo, u32 reg_hi,
424-
u8 *bar, u64 *offset, u8 *reg_type)
424+
static void cxl_decode_regblock(u32 reg_lo, u32 reg_hi,
425+
struct cxl_register_map *map)
425426
{
426-
*offset = ((u64)reg_hi << 32) | (reg_lo & CXL_REGLOC_ADDR_MASK);
427-
*bar = FIELD_GET(CXL_REGLOC_BIR_MASK, reg_lo);
428-
*reg_type = FIELD_GET(CXL_REGLOC_RBI_MASK, reg_lo);
427+
map->block_offset =
428+
((u64)reg_hi << 32) | (reg_lo & CXL_REGLOC_ADDR_MASK);
429+
map->barno = FIELD_GET(CXL_REGLOC_BIR_MASK, reg_lo);
430+
map->reg_type = FIELD_GET(CXL_REGLOC_RBI_MASK, reg_lo);
429431
}
430432

431433
/**
@@ -462,34 +464,23 @@ static int cxl_pci_setup_regs(struct cxl_mem *cxlm)
462464

463465
for (i = 0, n_maps = 0; i < regblocks; i++, regloc += 8) {
464466
u32 reg_lo, reg_hi;
465-
u8 reg_type;
466-
u64 offset;
467-
u8 bar;
468467

469468
pci_read_config_dword(pdev, regloc, &reg_lo);
470469
pci_read_config_dword(pdev, regloc + 4, &reg_hi);
471470

472-
cxl_decode_register_block(reg_lo, reg_hi, &bar, &offset,
473-
&reg_type);
471+
map = &maps[n_maps];
472+
cxl_decode_regblock(reg_lo, reg_hi, map);
474473

475474
/* Ignore unknown register block types */
476-
if (reg_type > CXL_REGLOC_RBI_MEMDEV)
475+
if (map->reg_type > CXL_REGLOC_RBI_MEMDEV)
477476
continue;
478477

479-
base = cxl_pci_map_regblock(cxlm, bar, offset);
478+
base = cxl_pci_map_regblock(pdev, map);
480479
if (!base)
481480
return -ENOMEM;
482481

483-
map = &maps[n_maps];
484-
map->barno = bar;
485-
map->block_offset = offset;
486-
map->reg_type = reg_type;
487-
488-
ret = cxl_probe_regs(cxlm, base + offset, map);
489-
490-
/* Always unmap the regblock regardless of probe success */
491-
cxl_pci_unmap_regblock(cxlm, base);
492-
482+
ret = cxl_probe_regs(pdev, base + map->block_offset, map);
483+
cxl_pci_unmap_regblock(pdev, base);
493484
if (ret)
494485
return ret;
495486

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